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    <title>RSS News Feed for Cadence Design Systems - from Electronicstalk</title>
    <link>http://www.electronicstalk.com/news/cad/cad000.html</link>
    <description>Cadence Design Systems news releases on Electronicstalk</description>
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    <copyright>Copyright (C)2008 Pro-Talk Ltd. All rights reserved.</copyright>
    <pubDate>Fri, 26 Sep 2008 08:00:00 UT</pubDate>
    <lastBuildDate>Fri, 26 Sep 2008 08:00:00 UT</lastBuildDate>
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      <title>Software addresses high-density interconnects</title>
      <description>Latest release delivers advanced IC system-in-package miniaturisation, design cycle reduction and DFM-driven design, along with a new power integrity modelling solution.</description>
      <pubDate>Tue, 19 Aug 2008 08:00:00 UT</pubDate>
      <category>Cadence Design Systems</category>
      <link>http://www.electronicstalk.com/news/cad/cad456.html</link>
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    <item>
      <title>PCB software promises faster design cycles</title>
      <description>New technology will be of particular value to customers in the high-end consumer electronics market, as well as those where users are seeking a constraint-driven HDI design flow.</description>
      <pubDate>Tue, 19 Aug 2008 08:00:00 UT</pubDate>
      <category>Cadence Design Systems</category>
      <link>http://www.electronicstalk.com/news/cad/cad457.html</link>
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      <title>Software speeds IC design</title>
      <description>The streamlined design flow enabled reduced iterations through large-scale, top-down RTL synthesis based on direct physical interconnect timing.</description>
      <pubDate>Wed, 16 Jul 2008 08:00:00 UT</pubDate>
      <category>Cadence Design Systems</category>
      <link>http://www.electronicstalk.com/news/cad/cad455.html</link>
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      <title>Compiler re-uses IP to speed SoC development</title>
      <description>C-to-Silicon Compiler enables engineers to design at a higher level of abstraction and helps automate the analysis of hardware micro-architecture. </description>
      <pubDate>Tue, 15 Jul 2008 08:00:00 UT</pubDate>
      <category>Cadence Design Systems</category>
      <link>http://www.electronicstalk.com/news/cad/cad454.html</link>
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      <title>"Turbo" technology speeds RF circuit verification</title>
      <description>Cadence has added the "turbo" technology it recently brought to the Virtuoso Spectre Circuit Simulator to its RF analysis. </description>
      <pubDate>Tue, 17 Jun 2008 08:00:00 UT</pubDate>
      <category>Cadence Design Systems</category>
      <link>http://www.electronicstalk.com/news/cad/cad452.html</link>
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      <title>Advanced simulator maintains Spice accuracy</title>
      <description>National Semiconductor is using the Spectre simulator to verify its large, complex production analogue ICs.</description>
      <pubDate>Tue, 17 Jun 2008 08:00:00 UT</pubDate>
      <category>Cadence Design Systems</category>
      <link>http://www.electronicstalk.com/news/cad/cad453.html</link>
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    <item>
      <title>Reference design targets UMC 65nm process</title>
      <description>Cadence Design Systems and UMC's reference flow enables customers to achieve optimal 65nm low-power designs when used with UMC's Low Power Kit.</description>
      <pubDate>Tue, 10 Jun 2008 08:00:00 UT</pubDate>
      <category>Cadence Design Systems</category>
      <link>http://www.electronicstalk.com/news/cad/cad450.html</link>
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    <item>
      <title>Verification IP products suit OVM users</title>
      <description>The AMBA 3 AXI and AMBA AHB VIP are now available as multilanguage universal verification components (UVC) and are the first to provide OVM support within the Cadence VIP portfolio. </description>
      <pubDate>Tue, 10 Jun 2008 08:00:00 UT</pubDate>
      <category>Cadence Design Systems</category>
      <link>http://www.electronicstalk.com/news/cad/cad451.html</link>
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    <item>
      <title>IC design offering eases 65nm processes</title>
      <description>The Cadence Virtuoso custom design platform offers speedier simulation tools for accurate and efficient verification of complex designs. </description>
      <pubDate>Wed, 30 Apr 2008 08:00:00 UT</pubDate>
      <category>Cadence Design Systems</category>
      <link>http://www.electronicstalk.com/news/cad/cad448.html</link>
    </item>
    <item>
      <title>Circuit simulator receives upgrade</title>
      <description>The Cadence Virtuoso Spectre circuit simulator eases the verification of phase-locked loops, analogue-to-digital convertors, transceivers, clock data recovery circuits and power supply circuits. </description>
      <pubDate>Wed, 30 Apr 2008 08:00:00 UT</pubDate>
      <category>Cadence Design Systems</category>
      <link>http://www.electronicstalk.com/news/cad/cad449.html</link>
    </item>
    <item>
      <title>RF design software is qualified at 65nm</title>
      <description>Newly qualified technologies deliver tested and proven inductance, substrate extraction and passive component design.</description>
      <pubDate>Tue, 15 Apr 2008 08:00:00 UT</pubDate>
      <category>Cadence Design Systems</category>
      <link>http://www.electronicstalk.com/news/cad/cad447.html</link>
    </item>
    <item>
      <title>University leads in design verification training</title>
      <description>Dr Kerstin Eder has been invited to present her work at the Cadence Academic Network Symposium during CDNLive, the Cadence annual user conference</description>
      <pubDate>Tue, 08 Apr 2008 08:00:00 UT</pubDate>
      <category>Cadence Design Systems</category>
      <link>http://www.electronicstalk.com/news/cad/cad446.html</link>
    </item>
    <item>
      <title>Software smoothes late design changes</title>
      <description>Encounter Conformal ECO Designer helps users evaluate the feasibility of engineering change orders and enables them to implement functional changes to the design very late in the design cycle</description>
      <pubDate>Wed, 26 Mar 2008 08:00:00 UT</pubDate>
      <category>Cadence Design Systems</category>
      <link>http://www.electronicstalk.com/news/cad/cad444.html</link>
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    <item>
      <title>Cadence acquires Chip Estimate</title>
      <description>Chip Estimate customers will benefit significantly from the synergies and opportunities created by the combination of the companies.</description>
      <pubDate>Thu, 13 Mar 2008 08:00:00 UT</pubDate>
      <category>Cadence Design Systems</category>
      <link>http://www.electronicstalk.com/news/cad/cad443.html</link>
    </item>
    <item>
      <title>Common format keeps power in mind</title>
      <description>Accent has successfully taped out a low-power RFID application design using the Common Power Format based Cadence Low-Power Solution.</description>
      <pubDate>Fri, 22 Feb 2008 08:00:00 UT</pubDate>
      <category>Cadence Design Systems</category>
      <link>http://www.electronicstalk.com/news/cad/cad442.html</link>
    </item>
    <item>
      <title>Open Verification Methodology is enhanced</title>
      <description>Distributed under the standard open-source Apache 2.0 licence, the OVM source code, usage examples and documentation may be downloaded free of charge from OVM World.</description>
      <pubDate>Fri, 15 Feb 2008 08:00:00 UT</pubDate>
      <category>Cadence Design Systems</category>
      <link>http://www.electronicstalk.com/news/cad/cad441.html</link>
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