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Product category: Design and Development Software
News Release from: Cadence Design Systems | Subject: PCB Expert 15.0
Edited by the Electronicstalk Editorial Team on 12 March 2003

Environment aids high-speed interface
design

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Cadence has a new methodology for designing and implementing multigigabit serial interfaces in high-speed PCB systems.

Addressing the differential signalling problems inherent in integrating nanometre-scale devices into systems, Cadence has announced a new methodology for designing and implementing multigigabit serial interfaces in high-speed PCB systems The new capability can speed time-to-market for networking and communications companies

"Nanometre silicon technology is creating SoCs that can run at datarates of 10Gbit/s at the PCB level", said Charlie Giorgetti, Corporate Vice President and General Manager of the Cadence PCB Systems Division.

"At these speeds, engineers are challenged with signal integrity; timing; and complex, multilayer routing issues.

The new differential signalling solution can increase their productivity so they get products to volume sooner by allowing them to create, constrain, simulate, and manage differential signals throughout the entire design flow".

Complex multiboard backplane applications can have hundreds - or even thousands - of differential signal pairs, causing long cycle times as engineers perform numerous layout-analyse-fix iterations to successfully complete a design.

The new Cadence simulation-driven environment enables them to reduce design time by introducing the ability to design a comprehensive set of rules within Constraint Manager, and then use those rules to drive layout and routing.

This can eliminate numerous iterations and enables first-time design success.

"The differential signal exploration, simulation, and post-route extraction capabilities of SpecctraQuest are invaluable to design engineers facing the challenge of high-speed serial interface design", said Joe Socha, Manager, Signal Integrity Analysis Group, Plexus Corp.

"Being able to define simulation-derived constraints that drive the interactive and automatic routing will save considerable PCB design time, as well as reduce the need for exhaustive post-route analysis".

The differential signal capability is part of the new 15.0 release of the Cadence PCB Expert series design environment.

The release includes enhancements in SpecctraQuest SI Expert, Allegro layout, and Specctra Autorouter.

The ability to define a comprehensive set of rules within Constraint Manager enables constraint-driven layout in Allegro for differential signals.

This can shorten the design cycle by reducing time-consuming and frustrating layout-simulate-fix iterations.

A new capability in Allegro to treat differential signal pairs as a single entity while interactively routing them with a heads-up display shows information on phase or delay control and options to use various via-patterns.

Also new is the power to edit an existing differential signal, or group of differential signals, using interactive push/shove routing while maintaining full electrical rule/constraint compliance.

This feature in SpecctraQuest and Allegro reduces the need for tedious post-edit resimulation iterations.

Custom stimulus and custom measurement capabilities allow SpecctraQuest users to make complex measurements such as common mode offset measurements from die pads inside the IC package.

A user can now quickly understand the influence of the package on the performance of differential signals.

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