Product category:
Design and Development Software
News Release from: Cadence Design Systems | Subject: Cadence Engineering Services
Edited by the Electronicstalk Editorial
Team on 12 November 2003
Virtual CAD service speeds TV SoC to the
show
Cadence Engineering Services enabled Zoran Microelectronics to meet its aggressive targets for launching the SupraTV 150 SoC, an advanced chipset for set-top box and digital television markets.
Cadence Engineering Services enabled Zoran Microelectronics to meet its aggressive targets for launching the SupraTV 150 SoC, an advanced chipset for set-top box and digital television markets Collaboration through the Cadence Virtual Integrated CAD (VCAD) service model enabled the companies' engineers to tackle design challenges remotely
This article was originally published on Electronicstalk on 20 Nov 2001 at 8.00am (UK)
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Based on its design expertise, the Cadence team was able to achieve successful first-pass tape out and enabled Zoran to demonstrate at the SupraTV 150 at the International Broadcast Convention 2003 in September.
The joint Cadence and Zoran teams implemented and managed Zoran's design environment from netlist to GDSII, all the way to ongoing operations and enhancement support.
"Cadence was a fundamental partner in the success of this project", said Nir Sever, Senior Director, VLSI Design for Zoran.
"We were faced with a severely restricted development timetable and demanding functionality requirements.
Cadence Engineering Services and leading technology enabled us to validate each stage of the design process, and with the dedication of the Cadence team we met our goals precisely".
Throughout the design cycle, Cadence Engineering Services deployed technologies of the Cadence Encounter digital IC design platform via the VCAD service model.
Through their collaboration, the designers met the demanding area requirements, given floorplan and timing constraints for analogue components and high speed blocks, and an aggressive project schedule.
"Our unique approach to service collaboration enabled Zoran's success in developing this complex SoC in such a tight design cycles", said Wolf-Ekkehard Matzke, Fellow of Cadence Design Systems.
"Using SoC Encounter hierarchical IC implementation solution to provide a complete design flow, we were able to ensure that this chipset was produced exactly to plan, and this work provides a firm platform for future product design projects by Zoran".
The SoC Encounter RTL-to-GDSII system - which encompasses the full design flow, from virtual prototype to full implementation - is a core technology of the Cadence Encounter digital IC design platform and supports 50-million-plus-gate hierarchical designs.
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