Product category:
Design and Development Software
News Release from: Cadence Design Systems | Subject: SpecctraQuest for Electrical Engineers
Edited by the Electronicstalk Editorial
Team on 21 November 2003
Signal-integrity analysis for front-end
PCB design
SpecctraQuest for Electrical Engineers (EE) is cost-effective software that enables engineers to manage the rapidly increasing high-speed content on complex PCB systems.
SpecctraQuest for Electrical Engineers (EE) is cost-effective software that enables engineers to manage the rapidly increasing high-speed content on complex PCB systems The new product, part of the constraint-driven PCB design flow, incorporates proven, Cadence SpecctraQuest signal-integrity (SI) technology, which helps electrical engineers shorten design cycle times and improve design quality and performance
This article was originally published on Electronicstalk on 20 Nov 2001 at 8.00am (UK)
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"SpecctraQuest EE will equip our front-end PCB engineers with many of the tools our SI specialists use on a daily basis, shortening time to market and helping to keep costs at a minimum by finding issues earlier in the design cycle", said Dr Kai Keskinen, Senior Signal Integrity Designer, CoreSim.
"We believe that this new design methodology will enhance productivity and efficiency as we continue to provide high-speed, leading-edge design services to our customers for complex and high-speed interfaces such as DDR SDRAM and SPI4.x".
The number of constrained nets on a typical high-speed board design has jumped from 25 to 75%, or more, of the design's total nets.
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The role of SI engineers within a design team is to analyse these nets.
However, this job is growing rapidly as the number of nets on a board that require analysis and the complexities of new chipsets increase dramatically.
The new design methodology supported by SpecctraQuest EE improves design-team productivity and minimises the impact on overloaded SI engineering resources, while controlling added costs, by enabling electrical engineers to develop and manage constraints on their designs without having to depend on SI engineers to analyse all of the constrained nets.
Today, engineering teams must identify constrained nets and divide them in to two groups: those that are imperative to the design cycle and need to be verified quickly by SI engineers, and those that are not critical, which are not verified.
This practice has often meant that these less-critical nets were either overconstrained to assure a functional design or not managed at all, driving up the cost of the board.
The risk of board failure increases when critical nets are managed in this manner, forcing potentially avoidable and expensive respins.
SpecctraQuest EE enables electrical engineers to determine optimal constraints for those not-so-critical nets at the front end, while SI engineers are able to focus on new chipsets and very critical nets, saving time and money.
"We often see that with differing design environments and multigigabit data rates, new device simulation and implementation onto a PCB can be a complex, time-consuming and expensive process", said Charlie Giorgetti, Corporate Vice President and General Manager of the Silicon-Package-Board Business Unit at Cadence.
"Cadence is leading the way to overcome that industry hurdle with innovative technology such as SpecctraQuest for Electrical Engineers, and is committed to finding ways to help electrical engineers develop and manage constraints up front in the design process in order to shorten the overall design cycle".
SpecctraQuest EE includes the proven, powerful, hierarchical Constraint Manager and SigXplorer graphical topology as its simulation cockpit, and is integrated tightly with the complete Cadence constraint-driven, high-speed design flow that includes SpecctraQuest SI Expert for high-speed design and analysis; Concept HDL for schematic entry; Allegro for layout; Specctra for autorouting; and Constraint Manager for defining, managing and validating constraints across the entire flow.
Electrical and SI engineers using SigXplorer can share constraint templates, including complex topologies for active and dynamic collaboration, in real time.
SpecctraQuest EE also offers a methodology guide for electrical engineers new to SI analysis to enable them to quickly and easily get started with constraint development.
SpecctraQuest EE provides electrical engineers with the ability to develop and manage constraints on critical nets earlier in the design cycle, improving the design process and decreasing overall PCB costs.
SpecctraQuest EE shortens the design cycle because electrical and SI engineers can share the load in developing and managing the increasing number of constrained nets on a complex high-speed PCB system.
SpecctraQuest EE, a subset of SpecctraQuest SI Expert, uses the same proven simulation engine already used by SI engineers in leading companies worldwide and includes the same powerful Constraint Manager used within Allegro, Concept HDL and SpecctraQuest SI Expert.
The entire Cadence 15.1 IC packaging and PCB design environment release, including SpecctraQuest for Electrical Engineers, will be available worldwide in late Q4 2003 and will support Windows, Sun Solaris, HP-UX, IBM AIX and Red Hat Linux platforms.
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