Product category:
Design and Development Software
News Release from: Cadence Design Systems | Subject: Encounter
Edited by the Electronicstalk Editorial
Team on 15 December 2003
Motorola reconfigurable device races to
tapeout
Cadence Design Systems has supported Motorola in successfully delivering one of its most complex integrated circuit designs with more than 62 million transistors.
Cadence Design Systems has supported Motorola in successfully delivering one of its most complex integrated circuit designs with more than 62 million transistors Cadence provided engineering services and a complete back-end design flow at 130nm
This article was originally published on Electronicstalk on 15 Apr 2004 at 8.00am (UK)
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Cadence Design Systems has made significant enhancements to its CeltIC 4.1 signal integrity solution, a key technology of the Encounter digital IC design platform for nanometre-scale IC designs.
As a result of the collaboration between the two companies, Cadence helped Motorola transition from a non-Cadence flow to a completely new methodology based on the Cadence Encounter digital IC design platform.
The new flow, targeted for the TSMC 130nm technology, enabled Motorola to progress through an aggressive design schedule from final netlist to tapeout within six weeks.
The company was able to bring to market the MRC6011, a highly programmable reconfigurable compute fabric (RCF) device, combining system-level flexibility and scalability with the cost-competitive and low power consumption characteristics of an ASIC-based device.
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"To address the demanding design requirements of 130nm geometries and the technical complexity of our 62 million transistor device, Motorola turned to Cadence to provide one of the most advanced back-end design flows available", said Frederic Haine, Motorola's General Manager Networking and Computing System Group, Europe.
"Using the Encounter platform, we achieved post-layout timing closure with remarkably little integration effort, allowing us to meet our aggressive tape-out target.
The expertise of the Cadence engineering services team, particularly in the closing stages, was vital in enabling us to deliver one of our most complex IC designs ever".
"One of the primary goals of the MRC6011 project was to significantly speed up the migration of the highly skilled Motorola design team to the Encounter platform and 130nm geometries", said Guillaume d'Eyssautier, Vice President and General Manager of Cadence Europe.
"Our expertise in providing solutions for large and highly-complex designs helped ensure the success of Motorola.
Because the Encounter platform can handle nanometre design issues, particularly signal integrity effects, it was a critical success factor during the design cycle".
The advanced Motorola MRC6011 RCF device, heralds in a new era in signal processing.
It is a highly powerful device suited for MIPS-intensive, complex tasks in computationally intensive applications such as baseband processing for 2.5G and 3G basestations, broadband wireless access systems and signal processing for advanced features such as adaptive antenna (AA) and multi-user detection (MUD).
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