Platform reduces verification bottlenecks

Leading technology companies, including Fujitsu Network Technologies and S3 Graphics, have adopted the Cadence Incisive functional verification platform.

Leading technology companies, including Fujitsu Network Technologies and S3 Graphics, have adopted the Cadence Incisive functional verification platform.

These industry leaders report that the methodologies and technologies of the Cadence Incisive platform have enabled them to obtain significant productivity gains in the verification of complex, multi-million-gate SoC designs.

The Incisive platform can compress overall verification time by as much as 50%.

The Incisive platform employs the world's first single-kernel architecture that overcomes fragmentation by unifying multiple verification techniques around a single engine.

The platform includes the Incisive unified simulator for verification of today's toughest designs, and the Palladium simulation acceleration and in-circuit emulation engine that brings added verification speed and efficiency.

The Palladium system can deliver 10,000 to 100,000 times faster simulation performance in emulation mode or in embedded testbench mode.

Also integrated into the platform is the Conformal equivalence checking tool, which came to Cadence as a part of the Verplex Systems acquisition in 2003.

Conformal technology delivers the only complete equivalence checking solution available for verifying complex SoC designs from RTL to layout.

"By buying Verplex, Cadence got a first-class company and tool", said John Cooley, DeepChip Editor and author of the 2003 DAC Trip Report.

Located in Yokohama, Japan, Fujitsu Network Technologies, a design subsidiary of Fujitsu, deployed the Incisive platform to meet the aggressive design goals of creating a new voice and signal processor to diversify its product offering.

"We adopted the Cadence Incisive verification platform for its mixed simulation and testbench capability, based on SystemC and RTL-HDL", said Eisuke Yuri, Senior Engineer, Advanced LSI Development Department, Fujitsu Network Technologies.

"Using the simulator, we could conduct our work seamlessly, without concern for code differences.

The new Incisive flow reduced the verification portion of the project from two weeks to three days and eliminated the need for hand-coding and rewriting RTL".

"In-circuit emulation is critical to keeping S3 Graphics on top of the graphics acceleration market", said Michael Shiuan, Vice President of engineering, S3 Graphics of Fremont, California, a leading supplier to the 3D-enabled PC graphics market it pioneered.

"Palladium enhanced in-circuit debug capabilities and the in-circuit speed improvement helped our verification engineers to increase their verification productivity dramatically.

The combination of speed and efficiency improvements is just what we expected when we invested in the Incisive platform".

"Leading design teams worldwide are already realising the tremendous speed and efficiency gains that the Incisive platform offers", said Ping Chao, Executive Vice President and General Manager, Design and Verification, Cadence.

"Incisive adoption is exceeding even our optimistic expectations, with over 70% of our Q1 2004 verification business going to the Incisive platform versus our traditional verification point tools".

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