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Product category: Design and Development Software
News Release from: Cadence Design Systems | Subject: Encounter Diagnostics
Edited by the Electronicstalk Editorial Team on 22 October 2004

Novel tool promises to boost nanometre
yields

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Cadence Encounter Diagnostics is billed as the semiconductor industry's first yield diagnostics tool.

Cadence Encounter Diagnostics is billed as the semiconductor industry's first yield diagnostics tool Encounter Diagnostics accelerates yield by identifying customers' most critical nanometre IC yield issues and precisely locating root cause defects

The result is higher yield in less time.

The new tool supports all digital design styles and test vectors produced by all popular automatic test pattern generation tools.

"Leading-edge chip designers and manufacturers require advanced diagnostic tools to effectively test and verify their increasingly complex designs", said Michael Bouvier, Manager of PowerPC New Product Intro at IBM.

"We collaborated with Cadence to refine a diagnostics system that can deliver a unique set of features and capabilities ideal for both volume and precision nanometre diagnostics".

Yield ramp is perhaps the biggest challenge presented by nanometre designs today.

According to a recent report from International Business Strategies, the time to reach nominal yield has lengthened to six to nine months for 130nm designs.

Many IC products do not reach expected yields during their lifetime.

The main problem is subtle design-process interactions that are not predictable before actual silicon and difficult to isolate within silicon.

Encounter Diagnostics brings a proven solution to the general market for the first time.

Developed in conjunction with IBM and demonstrated with select customers, the tool provides a unique set of advanced capabilities required for effective volume and precision operation.

It includes static and dynamic diagnostics, patented Pattern Fault Modelling, and support for all industry standard test vectors.

Traditional ATPG-based diagnostics tools are typically less than 40% accurate at 130nm and do not support volume operation, dynamic diagnostics, customisable fault modelling, or vectors generated by other ATPG tools.

Encounter Diagnostics was developed specifically to accelerate nanometre yield in production manufacturing environments.

In volume mode, the tool identifies the most critical design-related issues based on analysing a statistically significant sample size.

In precision mode, it precisely locates the root cause defects, which can then be verified in a physical failure analysis lab.

"Combining Encounter Diagnostics' advanced precision capabilities with our EmiScope time-resolved emission microscope provides joint customers with a very effective method of locating nanometre defects", said Dr Israel Niv, President, Diagnostics and Characterisation Group, Credence Systems Corp.

"AMD has used Encounter Diagnostics for evaluation and it has helped us achieve many of our target yields", said Pat Patla, Director, Server/Workstation Marketing, AMD's Microprocessor Business Unit.

"AMD is utilising some of the most advanced software tools available within our automated precision manufacturing to achieve unprecedented yield levels to deliver the greatest performance to our customers".

"Yield ramp is a huge problem for our customers working on nanometre ICs", said Paul Estrada, General Manager of Encounter Test for Cadence Design Systems.

"Encounter Diagnostics provides a proven system for quickly finding the root cause of the most critical design-related issues".

Encounter Diagnostics will be available in the Encounter Test 2.2 release shipping at the end of October.

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