Product category:
Design and Development Software
News Release from: Cadence Design Systems | Subject: Encounter
Edited by the Electronicstalk Editorial
Team on 14 December 2004
Platform accelerates supercomputer
chipset
Technology giant NEC Corp has used the Cadence Encounter digital IC design platform to develop the complete 90nm chipset for one of the world's fastest vector supercomputers.
Technology giant NEC Corp has used the Cadence Encounter digital IC design platform to develop the complete 90nm chipset for one of the world's fastest vector supercomputers With Encounter technology, NEC achieved a twofold improvement in chip performance on its most advanced, highest performance 90nm vector supercomputer chipset to date
This article was originally published on Electronicstalk on 15 Apr 2004 at 8.00am (UK)
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The NEC SX-8 chipset comprises four 90nm designs, including a hierarchical 9-million-instance chip that was routed flat for final engineering change order implementation and rapid design closure.
"We are extremely pleased with Encounter's ability to meet the many challenges presented by this breakthrough design", said Takeshi Nishikawa, General Manager, Computers Division, NEC Corp.
"Encounter met all of our timing and signal integrity requirements at 90nm, and reduced our leakage power by 40%".
"With Encounter's efficient memory handling and high performance, we reduced our turnaround time and time to market by nearly 30%".
"We congratulate NEC on the successful launch of this record-breaking vector supercomputer architecture and are proud that Encounter is at the core of such advanced LSI design technology and methodology", said Wei-Jin Dai, Platform Vice President, Digital IC Implementation at Cadence.
"Once again, a key customer has validated Encounter's unparalleled ability to handle extremely large and complex designs at leading-edge process technologies".
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