Product category:
Design and Development Software
News Release from: Cadence Design Systems | Subject: AMS Methodology Kit
Edited by the Electronicstalk Editorial
Team on 15 September 2005
Kit focuses on analogue and mixed signal
design
A novel kit enables analogue and mixed-signal designers of wireless, wired and consumer electronics devices to achieve shorter, more predictable design cycles while creating reusable AMS blocks.
Cadence Design Systems has announced the first offerings in its kits approach to addressing customer needs The Cadence AMS Methodology Kit enables analogue and mixed-signal (AMS) designers of wireless, wired and consumer electronics devices to achieve shorter, more predictable design cycles while creating reusable AMS blocks
This article was originally published on Electronicstalk on 2 Aug 2006 at 8.00am (UK)
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"In line with Cadence's kits approach, Bosch made the move to Cadence's AMS design methodology and flows to address the challenges of handling increased silicon complexity within shorter, more predictable design cycles, while maintaining zero-defect levels of quality", said Dr Peter van Staa, Senior Director, Methods Tools and Technologies, Automotive Electronics, Robert Bosch.
"These increased design capabilities and productivity, resulting from Cadence's silicon-accurate methodology and VCAD services for flow implementation, will be of key importance to Bosch going forward".
Built on the Virtuoso custom design platform with links to the Encounter digital IC design platform and the Incisive functional verification platform, the Cadence AMS Methodology Kit enables a more productive top-down, bottom-up design methodology.
The components of this kit address the key productivity challenges which affect the predictability and risk of AMS design: namely fragmented analogue, digital, and verification design processes; parasitic effects in AMS; multiple power supplies; and AMS design migration and reuse.
This methodology is enabled by the new Cadence AMS Block Flow with Reuse and Migration, the Cadence AMS Top-Level Flow, and the Cadence Analog Driven Physical Implementation Flow, along with a Generic Process Design Kit and simulation setups.
"IBM's CMOS8RF has proven an ideal semiconductor technology for analogue applications such as Bluetooth, LANs, wireless handsets and GPS applications", said Ken Torino, Director, Foundry Products for IBM Systems and Technology Group.
"Now IBM's industry-leading process design kits (PDKs ) will be compatible with the Cadence AMS Methodology Kit, beginning with CMOS8RF, which allows IBM's foundry customers to focus on their design problems by having access to Cadence's integrated methodology solutions".
The second kit offering announced today is the Cadence Optimisation Methodology Kit for ARM Processors, which helps design teams enhance performance, power utilisation, and area when designing with ARM cores and physical libraries.
The results of the kit build on the long-standing alliance between ARM and Cadence to more tightly integrate the companies' products to meet customer market requirements.
"These kit offerings are reflective of our strategy of delivering higher levels of productivity tuned to our customers' end-product goals", said Ajay Malhotra, Senior Vice President of Marketing at Cadence.
"We started in Q1 2005 with the Cadence Virtuoso Wireless Flows".
"Customers can expect more Cadence kits in the near future in areas of wireless, networking and consumer electronics as Cadence moves to a more focused kits approach".
"With each Cadence kit, we focus on addressing key design challenges, reducing respins and increasing design productivity".
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