Product category:
Design and Development Software
News Release from: Cadence Design Systems | Subject: Encounter Test Architect technology
Edited by the Electronicstalk Editorial
Team on 29 November 2005
DVD/CD SoC uses Encounter Test Architect
Cadence Design Systems' Encounter Test Architect technology has helped Atmel successfully tape out its first single-chip DVD/CD system-on-chip (SoC).
Cadence Design Systems' Encounter Test Architect technology has helped Atmel successfully tape out its first single-chip DVD/CD system-on-chip (SoC) With Encounter Test, Atmel's geographically distributed design team was able to fast track its project
This article was originally published on Electronicstalk on 20 Nov 2001 at 8.00am (UK)
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This helped Atmel complete test insertion and automatic test pattern generation (ATPG) on time to achieve high-quality, first-pass manufacturing success.
Atmel's recently announced AT78C4050 is a SoC focused on driving down cost and complexity for next-generation, high-performance optical disc-drive designs.
With this product, designers can, for the first time, use a single-chip controller that provides all analogue and digital functions for red and blue laser DVD and CD from servo system to ATAPI interface.
Its integrated partial response, maximum likelihood (PRML) read channel technology provides higher speed, higher density and improved performance over any currently available products.
"We used a globally distributed design team for this complex, first-in-class product", said Mehdi Bathaee, Atmel's Network Storage Business Unit General Manager.
"Inserting the test and generating patterns in time for tapeout was key to our project's success".
"With Encounter Test, and the Cadence team's support, we achieved our time-to-tapeout and exceeded test coverage objectives".
"Atmel's experience is an example of how Encounter Test Architect's unique compiler-based methodology inserts all required test structures with its automatic test infrastructure compilation and verification methodology - all from a single specification", said Sanjiv Taneja, Vice President of R and D for Encounter Test, at Cadence.
"We are proud to have contributed to Atmel's significant achievement with this design".
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