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Design and Development Software
News Release from: Cadence Design Systems | Subject: Virtuoso UltraSim
Edited by the Electronicstalk Editorial
Team on 07 February 2006
Simulator speeds to FastSpice results
Sirific Wireless has successfully designed its single-chip CMOS RF transceiver for HSDPA/W-Edge using the Cadence Virtuoso UltraSim full-chip simulator for FastSpice simulation.
Fabless RF semiconductor company Sirific Wireless has successfully designed its single-chip CMOS RF transceiver for HSDPA/W-Edge using the Cadence Virtuoso UltraSim full-chip simulator for FastSpice simulation The Virtuoso UltraSim simulator enabled Sirific to cut its verification time from two weeks to eight hours, allowing development in record time while ensuring silicon accuracy critical for mixed-signal designs
This article was originally published on Electronicstalk on 18 Aug 2004 at 8.00am (UK)
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Sirific designs and develops the Nexus family of single-chip CMOS RF transceivers for 3.5G and 2.75G mobile applications.
The Virtuoso UltraSim simulator helped Sirific improve its time to market by providing up to 40 times better performance than the company's previous methodology.
The simulator addresses the need to verify all critical functional modes, using a single testbench to verify a mix of purely analogue circuits where accuracy is needed and full digital circuits where the tolerance is relaxed.
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"Virtuoso UltraSim proved to be the best tool for achieving the balance between simulation time and verification coverage", said Michael J Hogan, President and CEO of Sirific Wireless.
"Virtuoso UltraSim greatly improved the efficiency of our designers by providing them the best combination of performance, convergence and accuracy, giving us confidence in our design leading to first pass silicon success".
"Sirific's adoption of Virtuoso UltraSim is a testimonial to our technology leadership in the simulation area", said Zhihong Liu, Corporate Vice President of R and D for Virtuoso Multi-mode Simulation at Cadence.
"Virtuoso UltraSim is our next-generation FastSpice simulator that provides custom designers the ability to verify their complex mixed-signal SoCs with the silicon accuracy they need to quickly get their products to market".
The Virtuoso UltraSim simulator is an integral part of Cadence Virtuoso Multi-mode Simulation, offering all the simulation components necessary for validating an IC or system.
Virtuoso Muti-mode Simulation provides a unique combination of Spice, FastSpice, AMS and RF simulation in a flexible single multimode simulation licensing model that maximises the value of a customer's investment.
Virtuoso Multi-mode Simulation is a cornerstone of the Virtuoso custom design platform.
All Virtuoso simulators - Virtuoso UltraSim Full-chip Simulator, Virtuoso AMS Designer Simulator, Virtuoso Spectre Circuit Simulator and Virtuoso Spectre RF Simulation Option - support common syntax and usage models, and share equations ensuring silicon-accurate results.
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