Product category:
Design and Development Software
News Release from: Cadence Design Systems | Subject: Encounter Conformal
Edited by the Electronicstalk Editorial
Team on 16 August 2006
Realtek finds critical bugs in power
connections
Realtek, a leading IC design house in Taiwan, uses Encounter Conformal Low Power and Encounter Conformal Constraint Designer to significantly reduce verification risks.
Cadence Design Systems and Realtek Semiconductor Corp have collaborated to successfully reduce the risk of functional errors on its pilot multiple-supply-voltage (MSV) design Realtek, a leading IC design house in Taiwan, adopted Cadence Encounter Conformal Low Power and Encounter Conformal Constraint Designer to significantly reduce verification risks
This article was originally published on Electronicstalk on 18 Nov 2004 at 8.00am (UK)
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Cadence Design Systems has made substantial enhancements to its market-leading Encounter Conformal technology.
Software keeps track of design constraints
Encounter Conformal Constraint Designer automates the generation and validation of design constraints at all stages of the design process from RTL to final netlist.
The Cadence product-segmentation strategy provided Realtek with multiple levels of technology tailored to specific levels of design complexity.
Realtek used Encounter Conformal Low Power to perform functional and structural checks to find critical bugs introduced during low-power implementation.
Encounter Conformal Constraint Designer helped Realtek ensure constraint quality by detecting inconsistent and conflict timing exceptions early in the design process, and to perform constraint validation to achieve faster timing closure.
Further reading
Verification package turns to low-power design
Cadence Encounter Conformal Low Power GXL provides the final tier of the Encounter segmentation strategy unveiled in September and is set to extend the lead that Cadence holds in formal verification.
Tool detects issues in design constraints
Faraday Technology Corp uses Encounter Conformal Constraint Designer technology to validate customers' design constraints, ensuring the quality of the design before implementation.
Timing constraint signoff tool passes the test
AMI Semiconductor has adopted Cadence Encounter Conformal Constraint Designer XL as its ASIC timing constraint signoff tool.
"Due to our excellent prior experience with the Encounter Conformal technologies, we did not hesitate to deploy Encounter Conformal Constraint Designer and Encounter Conformal Low Power on this important multi-supply-voltage design project", said Jessy Chen, Executive Vice President and spokesman for Realtek.
"Encounter Conformal Low Power reported critical bugs in power connections after place-and-route that our designers were then able to confirm and address".
"Encounter Conformal Constraint Designer provided a complete verification solution to help our engineers solve a difficult constraint problem".
"We look forward to working with the Cadence Encounter Conformal R and D team to continue the growth and leadership of this technology".
To face today's low-power design challenges; designers require new tools and methodologies to help verify the correct implementation of low-power design techniques.
Encounter Conformal technologies provide a unique combination of transistor abstraction, equivalency checking, and functional verification technology that enables customers to verify low-power designs.
"We are happy with the accelerated adoption of Encounter Conformal Constraint Designer and Encounter Conformal Low Power by the top semiconductor companies worldwide", said Michael Chang, Corporate Vice President, R and D for Cadence.
"Realtek's ongoing positive results with our Encounter Conformal technologies confirm what the market has been telling us - Encounter Conformal is among the best formal verification technologies on the market".
Encounter Conformal Low Power enables designers to verify and debug multimillion-gate designs optimised for low power.
It combines low-power structural and functional checks with world-class equivalence checking to provide superior performance, capacity and ease of use.
Encounter Conformal Constraint Designer automates constraint validation, generation, and refinement to ensure timing constraints are valid throughout the design process and help designers achieve rapid timing closure.
Encounter Conformal Low Power is available in XL and GXL offerings.
Encounter Conformal Constraint Designer is available in L and XL offerings.
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