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Design and Development Software
News Release from: Cadence Design Systems
Edited by the Electronicstalk Editorial
Team on 07 December 2006
Common power format ahead of schedule
Cadence Design Systems and Silicon Integration Initiative (Si2) have announced that Cadence has contributed the Common Power Format (CPF) to Si2's Low Power Coalition (LPC).
Cadence Design Systems and Silicon Integration Initiative (Si2) have announced that Cadence has contributed the Common Power Format (CPF) to Si2's Low Power Coalition (LPC) The contribution, provided before its anticipated date of January 31, 2007, was made as a result of significant customer input
This article was originally published on Electronicstalk on 20 Nov 2001 at 8.00am (UK)
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The contribution was made possible through comprehensive review of CPF by Power Forward Initiative (PFI) advisors, who provided more than 500 inputs that have been incorporated into CPF.
The PFI advisory group is comprised of leaders representing all segments of the electronics industry including semiconductor, foundry, semiconductor-equipment, systems and electronic-design automation companies.
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The extent of participation by these companies attests to the comprehensive applicability of CPF to a wide range of low-power design requirements.
"The industry has demanded a single standard for specifying low-power intent that will satisfy a broad set of needs throughout the full design flow, is capable of production use in the shortest time possible, and must absolutely be open - right now," said Steve Schulz, president and CEO, Si2.
"Si2 commends Cadence for the early contribution of CPF that now makes that vision possible, under the guidance of the entire LPC membership, to quickly move toward a single standard for broad industry benefit".
"We see the accelerated CPF contribution as a significant step towards getting unifying efforts behind a single power standard," said Lew Chua-Eoan, Senior Staff Manager from Qualcomm.
"Low-power design is a critical technology challenge for our industry".
"A common set of standards will bring significant design-time reduction and cost advantages for IP vendors as well as the user community".
"As one of the Low Power Coalition architects, I am very pleased that Cadence accelerated their contribution of the Common Power Format to Si2," said Dr Gary Delp, Distinguished Engineer, Office of the CTO, LSI Logic.
"It is crucial that Low Power Coalition work is open and that we move to align the various low power format efforts".
"Having the Common Power Format contributed enables the coalition to move quickly towards convergence around power standards which will benefit silicon designers and manufacturers as well as our mutual customer base".
"We're delighted that overwhelming customer input has enabled Cadence to accelerate the CPF schedule yet again and make the contribution to Si2 almost two months early," said Jan Willis, senior vice president of Industry Alliances at Cadence.
"Having included input from users across the design chain, and now being available to the Si2 LPC, CPF is open and a reality".
"It's time the industry unites".
"It's time for one standard".
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