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Product category: Design and Development Software
News Release from: Cadence Design Systems | Subject: Incisive
Edited by the Electronicstalk Editorial Team on 29 November 2007

Verification plan speeds overall
development

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Micronas has selected the Cadence Incisive Plan-to-Closure Methodology and Incisive Enterprise Manager for verification planning.

After a full functional verification audit helped discover and correct process flaws and areas of improvement for its overall product development process, Micronas has selected the Cadence Incisive Plan-to-Closure Methodology and Incisive Enterprise Manager for verification planning In addition, the audit helped bridge communications gaps and improve planning for various project development teams within differing time zones

As a result of the audit, Micronas chose Incisive Specman Elite Testbench automation.

Using Specman Elite's automation capabilities supported Micronas' wide efforts of reducing design cycle times.

In this audit, the team at Micronas found several risk areas.

The most significant improvement was that an intensive verification planning process early in the project would allow project managers to identify potential issues at the needed time, optimise resources and track with a unified coverage data base the overall status of the verification process against the expected progress or initial plan.

In addition, the audit led to more sharing of subsystem knowledge and configuration aspects of the designed device and top-level verification environment.

In each of these instances, Micronas was able to identify suitable process changes with guidance from the Incisive Plan-to-Closure Methodology and implement the changes using the planning and management capabilities in Incisive Enterprise Manager combined with the automation of Incisive Specman Elite Testbench.

"Cadence helped us re-evaluate our current verification development processes and identify opportunities to improve".

"The successful development of our recent line of 90nm complex consumer video products, including presilicon software verification on the Cadence Incisive Palladium emulator system, proves that we're on track", says Oliver Bell, Director of SoC Methodology at Micronas.

"We'll continue improving and automating our development environment; one important cornerstone is feedback from external audits with partners like Cadence".

Micronas found that a well-formulated verification environment should capture metrics throughout the lifetime of a project - including the development and integration of verification IP and assertion-based verification.

By incorporating these activities into the verification plan, Micronas was able to speed the overall development of the RTL and the verification environment, which is extremely important for project development and ultimate success.

Furthermore, the planning- and metric-driven approach offered the team guidance on how to better direct resources, thus increasing efficiency and providing control over the broader design and verification process.

"We're thrilled to be working closely with Micronas to help them realise the many benefits of implementing a methodology that leverages verification automation, planning and management", says Michal Siwinski, Group Director of Marketing at Cadence.

"We're confident that Micronas will continue to streamline their project development flow and we'll continue to support their needs".

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