Product category:
Intellectual Property Cores
News Release from: Cadence Design Systems
Edited by the Electronicstalk Editorial
Team on 14 January 2008
Programme cuts time and risk for
start-ups
The Cadence Start-up Accelerator programme will enable Analogies to focus on developing its high-speed PHY IP cores.
Analog Integrated Electronic Systems (Analogies) has joined Cadence Design Systems' European Start-up Accelerator programme Analogies specialises in the development and provision of high-speed analogue and mixed-signal intellectual property (IP) cores and high-speed analogue and mixed-signal design services
This article was originally published on Electronicstalk on 20 Nov 2001 at 8.00am (UK)
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"The Cadence Start-up Accelerator programme will enable Analogies to focus on developing its high-speed PHY IP cores, achieving its business and technology goals in a timely manner, while optimising its investment in headcount and infrastructure" said John Kikidis, Analogies CEO.
Cadence offers design tools, services and hardware.
"The program enables entrepreneurs and start-ups to benefit from a flexible business model offered through our VCAD model from Cadence Services".
"It also includes the extended design experience of our teams, who can demonstrate a large portfolio of successful start-ups which used their services".
"This reduces project risk for both the start-up and its investors" said Erez Tsur, Director of Business Development for Cadence Design Systems in the EMEA region.
Analogies is a member of the Hellenic Semiconductor Industry Association, a nonprofit association of high-technology companies that aim to fuel the growth of the semiconductors and embedded systems sector in Greece.
Dr Yorgos Koutsoyannopoulos, Chairman of Hellenic-SIA said "HSIA supports Analogies' decision to join the Cadence start-up programme, since the aim of both parties is to ease and facilitate young start-ups with the right means to get off the ground as quickly and successful as possible".
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