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News Release from: Cadence Design Systems | Subject: CPF-based Low-Power Solution
Edited by the Electronicstalk Editorial
Team on 22 February 2008
Common format keeps power in mind
Accent has successfully taped out a low-power RFID application design using the Common Power Format based Cadence Low-Power Solution.
System on chip design specialist Accent has successfully taped out a low-power RFID application design using the Common Power Format (CPF)-based Cadence Low-Power Solution The complex power strategy was captured in CPF, which was used both in the front-end and back-end implementation
This article was originally published on Electronicstalk on 20 Nov 2001 at 8.00am (UK)
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The use of CPF allowed Accent to preserve power intent throughout the design flow, cut down costly iteration between front-end design and implementation, and assist in unambiguously implementing the design.
"We are delighted to work with Cadence to enable first-time-right silicon solutions for our customers", says Federico Arcelli, CEO of Accent.
"We would not have achieved on-schedule tapeout of this complex low-power chip without using CPF and the CPF-based Low-Power Solution from Cadence".
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"Our customer handed-off CPF for the design along with the RTL after verification".
"We could do the complete implementation of the design without ever going back to the customer for any clarification".
The chip employed ARM libraries and was produced at Chartered Semiconductor.
It featured more than 10 power domains for aggressive power reduction.
This power intent was captured using CPF, which was used as a hand-off to the implementation.
Using the Cadence Low-Power Solution, Accent was able to tape out the customer's design using the same power-intent file.
This allowed Accent to avoid costly iteration in understanding the power intent and avoid errors in the implementation phase, which was key to the quick and successful completion of the design.
"The industry-wide collaborative efforts to automate advanced low-power designs with the Common Power Format have resulted in silicon successes around the world".
"This tapeout is yet another successful example of the effectiveness of the CPF-based Low-Power Solution", says Dr Chi-Ping Hsu, Corporate Vice President, Power Forward and General Manager of IC Digital at Cadence.
"Customers like Accent are seeing huge productivity benefits and reduced risks with aggressive power strategies using a CPF-based flow".
The Cadence Low-Power Solution is the industry's first complete flow, which integrates logic design, verification, and implementation technologies with the Common Power Format.
Available now, it is already proven on multiple tapeouts and multiple applications.
Designers have realised a 2x productivity increase with an average of 40% power savings using this flow.
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