Product category:
Design and Development Software
News Release from: Celoxica | Subject: DK1 for Virtex II
Edited by the Electronicstalk Editorial
Team on 20 June 2001
Design suite extended to latest FPGAs
Celoxica has extended its DK1 design suite for the rapid design of reconfigurable hardware to support Xilinx Virtex II customers.
Celoxica has extended its DK1 design suite for the rapid design of reconfigurable hardware to support Xilinx Virtex II customers From today DK1 customers will receive online access to a service pack that will enable them to target the advanced FPGA
This article was originally published on Electronicstalk on 6 Feb 2001 at 8.00am (UK)
Related stories
FPGAs updated over the web
Celoxica has announced the DK1 design suite, software that enables a fundamentally new approach to the design of electronic hardware.
Celoxica offers a free go at FPGA design
Celoxica DK1 Eval is a free evaluation version of the Celoxica DK1 design suite that is restricted to compilations for simulation only, with no EDIF or VHDL output capability.
All DK1 customers will be upgraded to support Virtex II design as part of a free DK1 service pack of enhancements delivered online.
The service pack provides a range of new DK1 features and upgrades including an extended complier to support the Altera Apex II PLD and a FlexLM license for users of Solaris 7.0 and Linux operating systems.
"The Virtex II platform emphasises the potential of reconfigurable products developed using our design methodology.
Virtex II takes the acceleration of data-intensive software functions in parallel hardware to new levels of performance with a high-end prototyping and product platform for bleeding edge applications.
When you designing for a 10 million system gate part you need a design suite such as DK1 that can balance abstraction with manual control over timing and structure to gain optimum results".
The Virtex II family features the first implementations of Xilinx's platform FPGAs, with gate densities from 40,000 to 10 million gates, advanced interfacing featuring both physical interface and protocol blocks, digital clock management and will, in the future, incorporate processor cores.
These platform FPGA features enable designers to address signal integrity, system timing, electromagnetic interference and design security issues.
DK1 developers will be able to prototype their designs on a series of new design-ready evaluation boards preloaded with Virtex II series FPGAs.
• Celoxica: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page
Search the Pro-Talk network of sites
