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Product category: Design and Development Hardware
News Release from: Celoxica | Subject: RC100
Edited by the Electronicstalk Editorial Team on 20 June 2001

Board helps with small to medium FPGA
prototyping

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New from Celoxica, the RC100 stand-alone development board provides a rapid prototyping platform for small- to medium-sized FPGA designs.

New from Celoxica, the RC100 stand-alone development board provides a rapid prototyping platform for small- to medium-sized FPGA designs The new board builds on the success of Celoxica's high-end RC1000 board, used for Virtex FPGA prototyping by more than 90 customers worldwide

The RC100 begins shipping from today.

The RC100 is based on Xilinx's fastest growing product line, the 200,000-gate Spartan II FPGA.

It provides high-performance, direct connection between the FPGA, the video input decoder and the video DAC for VGA output, as well as other I/O connections.

"The Spartan II is one of the industry's most popular FPGAs.

The RC100 provides a clear high-level design route for both software and hardware engineers to explore the potential of the Spartan II in applications requiring complex algorithmic processes such as encryption, compression and graphics routines", said Dennis Nye, senior vice president, worldwide sales and marketing, Celoxica.

In addition to a 24bit DAC VGA output and video decoder, the RC100 I/O includes two seven-segment LED displays, PS2 mouse and PS2 keyboard, with a 50-pin expansion header provided for processor and I/O expansion.

It has a file transfer utility to facilitate transfer of user FPGA configuration files directly to the FPGA or to Flash RAM.

Nye continued: "To enable designers to achieve rapid results, we have included on board the peripherals with associated drivers, which our customers most commonly need.

This makes the RC100 an extremely capable platform, for reducing development time and minimising prototyping costs".

The RC100 package provides simple uploading and modification of designs through the supplied file transfer utility.

This enables the EDIF developed in DK1 or HDL to be downloaded via the parallel port interface.

The RC100 package also includes pre-installed demonstrations, I/O configurations and worked Handel-C design examples.

To enable users of the DK1 development suite to immediately achieve results with the RC100, tutorials and demonstrations are included complete with source code.

The tutorials take designers through the DK1 design cycle.

They demonstrate how to use the Handel-C programming language to extract the benefits of parallel hardware as well as how to exert control over timing and design optimisation.

The tutorials range from simple exercises to drive the two seven-segment LED displays to real time processing of inputs from a video source.

A complex 3D graphics application is also included.

The demonstrations and tutorials have been selected to demonstrate the ease with which complex algorithms can be implemented in a $10 FPGA and the speed of processing which is achievable by using DK1's ability to generate parallel hardware streams.

The RC100 will be available from 18 June 2001 priced at $850.00.

From September 2001 the RC100 will ship with an API and platform resource support package to simplify the process of interfacing FPGA applications with on- and off-chip resources such as processors, memory, Ethernet MACs, video I/O chips or even other FPGAs.

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