Product category:
Design and Development Software
News Release from: Celoxica | Subject: PAL
Edited by the Electronicstalk Editorial
Team on 21 June 2001
PAL simplifies FPGA application
interfacing
Celoxica has announced its platform abstraction layer (PAL) strategy for FPGA and system independent reconfigurable designs.
Celoxica has announced its platform abstraction layer (PAL) strategy for FPGA and system independent reconfigurable designs Supporting the DK1 design suite, PAL simplifies the process of interfacing FPGA applications with on- and off-chip resources such as processors, memory, Ethernet MACs, video I/O chips or even other FPGAs
This article was originally published on Electronicstalk on 6 Feb 2001 at 8.00am (UK)
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Celoxica has announced the DK1 design suite, software that enables a fundamentally new approach to the design of electronic hardware.
Celoxica offers a free go at FPGA design
Celoxica DK1 Eval is a free evaluation version of the Celoxica DK1 design suite that is restricted to compilations for simulation only, with no EDIF or VHDL output capability.
PAL shields software engineers from low level interfaces to ease the integration of FPGAs to physical resources.
It does this by storing the proprietary physical interfaces to platform resources in a single library called the Platform Resource Support Package (PRSP).
The low level interfaces are wrapped in generic logical interfaces that are accessed using the PAL API.
Further reading
Design suite extended to latest FPGAs
Celoxica has extended its DK1 design suite for the rapid design of reconfigurable hardware to support Xilinx Virtex II customers.
Board helps with small to medium FPGA prototyping
New from Celoxica, the RC100 stand-alone development board provides a rapid prototyping platform for small- to medium-sized FPGA designs.
PII uses Celoxica DK1 to help pigs' data fly
PII has adopted Celoxica's DK1 design suite to improve design efficiency in the development of new hardware systems processing up to 6Mbyte/s of data for PII's fleet of "Intelligent Pigs".
"PRSPs are written once for each embedded system, the applications calling the API to access platform resources are then directly portable.
We believe that this approach can reduce porting times by as much as 90%", said Dennis Nye, senior vice president of Worldwide Sales and Marketing at Celoxica.
"The Handel-C programming language has brought software engineers into the hardware design flow.
PAL now lets them rapidly port designs from their prototype platform to their final system, or perform design reuse from one generation of a product to the next".
Nye continued: "So, at the same time as we are accelerating the development cycle for products leveraging FPGAs, we are allowing companies to make more effective use of their design resources".
The process of interfacing an FPGA application to other parts of an embedded system is time consuming with today's tools and FPGAs do not have operating systems to enable their applications to be platform independent.
For example; Wind River VxWorks uses BSP (Board Support Package) and Microsoft Windows NT uses HAL (Hardware Abstraction Layer).
These issues can seriously impact a customer's time-to-market as such integration requires low-level physical design expertise.
PAL introduces a layered design methodology that generates platform independent code by replacing platform resource interfaces with generic interfaces so that hardware integration can be done in a Handel-C environment by a simple process of resource allocation.
PAL consists of three parts.
The PAL API defines a set of macros and functions that can be used to form and access generic interfaces to platform resources.
The API gives Handel-C software engineers a simple way of communicating with hardware, shielded from low level design considerations.
The Platform Resource Support Package is a library of physical designs wrapped in standard interfaces that can be accessed using the PAL API.
The PRSP hides the low level interfaces associated with FPGAs and peripherals.
And the Engineered Platform Independent Application comprises applications written using the PAL API to access platform resources.
PAL will initially support the generation of ports for: generic bus interface, multiport coprocessing bus interface, distributed bus for FPGA interconnection, video I/O, Ethernet MAC, data streaming, memory access (on- or off-chip), message sending and message receiving PAL will begin shipping as a free bundle with Celoxica's RC100 and RC1000 development boards for rapid prototyping from Q3 2001.
PRSP customisation is available through Celoxica's design services.
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