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Product category: Design and Development Software
News Release from: Celoxica
Edited by the Electronicstalk Editorial Team on 29 November 2001

Celoxica has designs on Altera's SoPC
design flow

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Celoxica is to aim its high-level design and hardware coprocessing technology at Altera's SoPC-based solutions.

Celoxica is to aim its high-level design and hardware coprocessing technology to embedded systems and software engineers eager to drive system performance by implementing Altera's SoPC-based solutions Under a new agreement, the two companies will optimise Celoxica's Handel-C based design flow to support Altera's high-density programmable logic devices (PLDs) and Excalibur embedded processor solutions

The co-operation will focus around Altera's new generation PLDs, such as the APEX II and the Excalibur ARM-based devices, and Celoxica's DK1 design suite, which has at its heart the Handel-C programming language.

"The DK1 design suite is a superior design solution for hybrid reprogrammable logic and microprocessor devices and the Excalibur ARM-based embedded processor solution is a prime example", said Jon Treanor, president and CEO, Celoxica.

"We provide a straightforward method for targeting complex algorithmic designs and DK1 is flexible enough to work alongside other tool sets.

Coupled with our PAL initiative we can shield software engineers from low-level hardware interfaces and enable both new users and help existing users to reach the best design faster".

"The density, performance, and embedded processor capability of our devices make them ideal for system-level design including both hardware and software components", said Tim Southgate, Altera's vice president of software and tools marketing.

"We look forward to working with Celoxica to provide a cutting edge design flow that allows software engineers to easily harness the powerful application acceleration capabilities of our Excalibur embedded processor solutions".

Celoxica's strategic focus has been to position the programmable device as a co-processor that software engineers can couple to a CPU to exploit the benefits of accelerating code in parallel hardware.

To support its strategic focus Celoxica has developed a design environment for reprogrammable logic that is easy for software engineers to adopt, as well as an encompassing mechanism for function calls to be made from software within the microprocessor, to functions in reprogrammable devices or vice-versa.

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