Latest SoPC design suite to appear next month
Celoxica will publicly unveil DK1.1, the next version of its Handel-C-to-hardware design suite at Programmable World 2002 on 17th April 2002.
Celoxica will publicly unveil DK1.1, the next version of its Handel-C-to-hardware design suite at Programmable World 2002 on 17th April 2002.
DK1.1 includes a range of new features for reprogrammable system-on-a-chip design and will include support for the new Virtex-II Pro family of FPGAs from Xilinx.
"We are delighted to have been invited by Xilinx to demonstrate the capabilities of DK1.1 for Virtex-II Pro design", said Dennis Nye, senior vice president of worldwide sales and marketing at Celoxica.
"The Virtex-II Pro family combines both fast PowerPC processors and high-performance I/O to deliver a hardware platform that suits a broad range of challenging applications in the communications design space.
DK1.1 supports the Virtex-II Pro platform by providing new levels of hardware design efficiency.
It also allows closer collaboration between hardware designers, software engineers and system architects in the allocation of hardware and software system resources; this is particularly relevant when exploring the potential for overcoming performance bottlenecks by accelerating sequential algorithms on parallel hardware".
Programmable World 2002 will feature visionary presentations and technical training for reprogrammable systems-on-a-chip.
The event will be simulcast live to over 18 cities across North America and Europe including Paris, Boston, San Jose, Atlanta, Austin, Chicago, Columbia, Dallas, Long Island, Longmont, Los Angeles, Ottawa, Phoenix, Portland, Raleigh, San Diego, Seattle, Montreal and Toronto.
More information is available from Xilinx.
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