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Design and Development Software
News Release from: Celoxica | Subject: Software-compiled system design
Edited by the Electronicstalk Editorial
Team on 05 March 2003
Software-compiled system design rips
through FPGAs
Celoxica has revealed the results of an internal codesign collaboration with Xilinx.
Celoxica has revealed the results of an internal codesign collaboration with Xilinx Benchmarking solutions for system partitioning and coverification, the project achieved a 66% reduction in development time while meeting aggressive quality of results
This article was originally published on Electronicstalk on 5 Mar 2003 at 8.00am (UK)
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Celoxica and Xilinx joined forces to demonstrate the capabilities of software-compiled system design, a codesign methodology developed for programmable SoC.
JPEG2000 was selected as the application, and the design was targeted for implementation in Virtex II Pro.
Specifically, the project sought to address the design challenge of system partitioning, coverification and the integration of hardware and software in a platform FPGA device.
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"Software-compiled system design offers clear and compelling advantages for designers of programmable SoC and we've proved it", said Jeff Jussel, VP Marketing at Celoxica.
"The methodology provides a seamless bridge between hardware and software, offers extremely fast simulation time and we have fine tuned our system level support working with partners to ensure the best overall quality of design (QoD)".
At the heart of software compiled system design is the principle of providing a direct link between the programmable platform and the system functionality as originally defined.
This enables the necessary system verification flow and offers confidence to designers who want to fully explore the design space - pushing the envelope of design innovation and product differentiation.
The methodology also deploys novel partitioning technology that permits flexible hardware/software partitioning.
This enables tradeoff analysis through system partition and repartition at any stage in the design and is supported by a very fast simulation environment that permits the designer to efficiently perform multiple design iterations and helps reduce design time.
And by using higher level languages, the methodology enables the system specification to be written in a form that both hardware and software teams can immediately use.
"Software-compiled system design not only offers the distinct advantages of system partitioning and system verification to existing users of FPGA and programmable systems technology, it is also an attractive design solution for new users", said Dave Bennett, Vice President of Logical Systems Software for Xilinx.
"In the era of the platform FPGA Xilinx is committed to providing the best system level solutions to its customers and our partnership with Celoxica is evidence of that".
Total design time for the Celoxica JPEG2000 implementation was 19 days of engineering effort, including partitioning and verification, compared with 50 days of engineering effort for the VHDL based implementation - that did not include partitioning.
"The results provide clear validation that software-compiled system design delivers increased designer productivity without compromising on performance", continued Jussel.
"We met aggressive QoR targets benchmarked for the design and delivered the best design time whilst reducing risk".
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