Product category:
Design and Development Software
News Release from: Celoxica
Edited by the Electronicstalk Editorial
Team on 12 May 2004
Safety and security applications on show
at DAC
BAE Systems and Celoxica will demonstrate novel safety and security applications in the Celoxica booth at the 41st Design Automation Conference in San Diego from 7th to 11th June 2004.
BAE Systems and Celoxica will demonstrate novel safety and security applications in the Celoxica booth at the 41st Design Automation Conference in San Diego from 7th to 11th June 2004 The demonstrations, built with BAE Systems' LEARRNN (logic enabled asynchronous rapid robust neural network) technology, Celoxica's System FPGA design tools and RC series development platforms, showcase the application of LEARRNN technology for the emerging challenges of video surveillance and biometrics
This article was originally published on Electronicstalk on 6 Feb 2001 at 8.00am (UK)
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Celoxica has announced the DK1 design suite, software that enables a fundamentally new approach to the design of electronic hardware.
Celoxica offers a free go at FPGA design
Celoxica DK1 Eval is a free evaluation version of the Celoxica DK1 design suite that is restricted to compilations for simulation only, with no EDIF or VHDL output capability.
Using Celoxica's RC200 digital image and signal processing reconfigurable development platform, both applications embody library elements for users to implement video image processing and pattern-matching functions frequently required in the two safety and security applications.
Customer solutions are delivered by the BAE Systems and Celoxica partnership via their integrated design tools and Celoxica professional consulting services.
The partnership's "one to many" fingerprint matching engine provides a match result (identification) of a test fingerprint against an enrolled database of up to 800 in less than 50ms, using the standard CFMEF (Common Fingerprint Minutiae Exchange Format) fingerprint format and by fusing correlation and minutia based matching techniques.
Further reading
Design suite extended to latest FPGAs
Celoxica has extended its DK1 design suite for the rapid design of reconfigurable hardware to support Xilinx Virtex II customers.
Board helps with small to medium FPGA prototyping
New from Celoxica, the RC100 stand-alone development board provides a rapid prototyping platform for small- to medium-sized FPGA designs.
PAL simplifies FPGA application interfacing
Celoxica has announced its platform abstraction layer (PAL) strategy for FPGA and system independent reconfigurable designs.
A single matching node within the demonstrator can hold many multiples of enrolled fingerprints locally, and its design is deliberately scalable to accommodate very large fingerprint databases by adding further matching nodes in parallel.
"LEARRNN is ideally suited to accelerating biometric identification applications because it provides an economic, pure logic correlation architecture", said Bob Flint, Director, Ventures, BAE Systems.
"Coupled with reconfigurable processing technology and system level design techniques, LEARRNN enables a massive number of matching processes to run in parallel with easy data fusion of the results.
This performance and scalability in a compact and portable format carries many advantages and overcomes some of the current issues associated with automatic fingerprint matching and analysis".
Using the LEARRNN technique all functions are built using a combination of pure logic and memory and with custom design enabled via the DK Design Suite, product-engineered implementations in silicon are straightforward.
"With the global focus on authenticating people's identity, biometrics is an important application area.
It requires an order of magnitude leap in performance if the goals of safe border control and secure access to valuable resources and assets are to be realised", commented Tony Vitucci, VP of Consulting for Celoxica.
"By combining our expertise, BAE Systems and Celoxica have developed a solution that is applicable to many classes of pattern matching problems".
The second demonstrator will show noise removal on real-time video using a 3x3 neural filter operator.
The filter is capable of operation at more than 100MHz pixel clock frequency on a 752 x 582 (CIF+) pixel input digitised video stream.
This means it can deal with real time frame rates of 240Hz at this resolution, or with a 1280 x 960 (eg HDTV) image at 60Hz frame rate.
A single filter provides a factor of 10 reduction in impulsive noise, and uses 150 LUT slices (30k gate equivalents).
The filter is easily cascaded or scaled to accommodate larger or more complex operators.
The real time video filter demonstration showcases another key application area for BAE Systems and Celoxica in real-time signal and video image processing, both in security and other markets demanding high performance solutions such as broadcast, wireless mobile and automotive safety.
"Fast image processing without the need for complex math and extended design times is remarkable", Vitucci stated.
"We help customers implement object detection and tracking functions with a low development overhead compared to traditional programming methods and silicon architectures.
We're making the difference by providing an incredibly fast design path to implementation of pattern recognition, fault/difference detection and diagnosis/interpretation in reconfigurable hardware".
All basic LEARRNN functions and building blocks are available as a toolbox for Matlab.
Custom IP is designed using the DK Design Suite and full system cosimulation is made easy by using Celoxica's cosimulation technology for multiple concurrent simulations.
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