Product category:
Design and Development Software
News Release from: Celoxica | Subject: DK Design Suite and Agility Compiler
Edited by the Electronicstalk Editorial
Team on 30 September 2004
Tools to support latest-generation FPGAs
Celoxica will support the newly introduced Virtex-4 FPGAs through the latest release of its suite of system design and synthesis tools.
Celoxica will support the newly introduced Virtex-4 FPGAs through the latest release of its suite of system design and synthesis tools Celoxica's tools, the DK Design Suite and Agility Compiler, synthesise highly complex algorithms described in C or SystemC direct to the FPGA fabric
This article was originally published on Electronicstalk on 6 Feb 2001 at 8.00am (UK)
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FPGAs updated over the web
Celoxica has announced the DK1 design suite, software that enables a fundamentally new approach to the design of electronic hardware.
Celoxica offers a free go at FPGA design
Celoxica DK1 Eval is a free evaluation version of the Celoxica DK1 design suite that is restricted to compilations for simulation only, with no EDIF or VHDL output capability.
Alternatively the designer can use the same algorithmic description and output RT level VHDL and Verilog.
To make best use of the Virtex 4 architecture synthesis support includes memory tiling, logic packing, automatic use of fast carry logic, packing of arithmetic functions into Xtreme DSP slices and options for retiming.
"With our Virtex-4 family scaling to densities of 200,000 logic cells, the industry's highest, electronic system level (ESL) design tools play an increasingly important role in helping designers to more quickly investigate, explore and implement large capacity designs", said Steve Lass, Director Software Marketing at Xilinx.
"By taking design entry to higher levels of abstraction, Celoxica helps our mutual customers to quickly map large and complex design functions easily and efficiently into our FPGA devices".
"As modern programmable logic devices such as the Virtex-4 continue to deliver ever more density and functionality, designers must be enabled to quickly exploit all of the features available", said Jeff Jussel, Vice President of Marketing for Celoxica.
"Using the most advanced, high-level synthesis technology our DK Design Suite and Agility Compiler deliver the specification to silicon productivity that today's designers demand and match excellent QoR results with processor and coprocessor support to provide a complete programmable design solution".
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