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System-level design supports structured ASICs

A Celoxica product story
Edited by the Electronicstalk editorial team Jun 20, 2005

Celoxica is supporting Altera's HardCopy II structured ASIC family with its Agility Compiler for SystemC and the DK Design Suite.

Celoxica is supporting Altera's HardCopy II structured ASIC family with its Agility Compiler for SystemC and the DK Design Suite.

The tools and methodology support a seamless flow from algorithm and transaction level model (TLM) to a Stratix II FPGA prototype, and then to a HardCopy II structured ASIC.

The ESL design flow and FPGA front-end speeds verification and design productivity and enables algorithm acceleration in the structured ASIC by providing a direct path for silicon implementation from SystemC models and ANSI-C software.

"There is an increasing emphasis in the volume digital-image and signal-processing markets to accelerate algorithms in flexible, low-power, high-performance silicon, with more of the design and verification effort being moved to the system level to tackle the inherent complexity", said Jeff Jussel, Vice President of Marketing for Celoxica.

"Couple this with relentless pressures on time to market, cost and designer productivity, our C-based design and synthesis technology provides the most cost-effective design and implementation route from algorithm and TLM to HardCopy II structured ASIC".

Targeted at the growing number of designers who have less time to develop and differentiate high-performance complex designs, Celoxica's ESL tools dramatically reduce multi-million-gate simulation and verification times compared with traditional design flows and speed implementation by automatically generating RTL descriptions and EDIF netlists from SystemC and Handel-C.

Designers using Altera's HardCopy II structured ASIC can exploit the array of hardware logic optimisations available in the Agility Compiler and DK Design Suite to quickly develop high-performance, area-efficient implementations.

"HardCopy II structured ASIC provides the only seamless prototype to structured ASIC production migration in the market", said Alain Bismuth, Vice President of the HardCopy Product Group, Altera Corporation.

"Supported by Celoxica's Agility Compiler for SystemC and DK Design Suite, designers can leverage the benefits of C-based ESL design with HDL and block-based approaches".

"This integration provides a common development platform for system, algorithm and hardware designers when targeting the HardCopy II structured ASIC".

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