C-based design tools support new RASC technology

Celoxica has added support for Silicon Graphics' reconfigurable application-specific computing (RASC) technology to its DK Design Suite of tools for C-based design and synthesis.

Celoxica has added support for Silicon Graphics' reconfigurable application-specific computing (RASC) technology to its DK Design Suite of tools for C-based design and synthesis.

Celoxica and Silicon Graphics have teamed to deliver libraries and tools defining a software programming environment for algorithm acceleration using field-programmable gate arrays.

Silicon Graphics intends to include evaluation copies of Celoxica's design software as part of its RASC development kit shipping this month.

"For FPGA-based acceleration in high-performance computing applications, having a software-based programming environment is extremely important", said Steve Miller, Chief Engineer, System Architecture, at Silicon Graphics.

"The Celoxica tools give RASC customers an easy-to-use programming environment for accelerating their C software algorithms using the parallel processing capabilities of FPGA without going through hardware description languages".

RASC is the term coined by Silicon Graphics in reference to high-performance computing systems which use FPGA technology in a coprocessor model.

Reconfigurable chips can be programmed by a customer to optimise their specific tasks in coprocessing systems that can offer significant - potentially orders of magnitude - performance improvements at lower power and heat than conventional microprocessors alone.

Applications that can benefit from this approach include image recognition, decryption, gene comparison, video format translation, and data compression to name a few.

Previous FPGA-based acceleration systems have been limited by the traditional chip design process centred on hardware description languages (HDL).

HDL use is both foreign and difficult for most end-user programmers and is too slow for software-oriented algorithm development.

To solve this problem, Celoxica provides a mature and proven C-based design and synthesis environment to accelerate software algorithms on RASC systems.

The DK Design Suite of tools delivers a programming path directly to RASC systems from algorithm to system implementation, including software-based design entry, cycle-accurate simulation, C-based synthesis and seamless integration with FPGA vendor place and route tools.

Algorithm development using Celoxica tools is typically 60% faster and produces FPGA results that rival HDL flows.

"We are very pleased that SGI chose to include Celoxica tools as one of the C-programming environments in its RASC development kit", said Phil Bishop president and CEO of Celoxica.

"This shows the potential of reconfigurable computing and value of C-based design and synthesis in opening access to these systems for users and for new applications".

"It is truly exciting to be able to offer so much potential for so many markets".

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