C-based design and synthesis helps cut gridlock

Celoxica, Calsonic Kansei Corp and researchers at Keio University have codeveloped a new drive-by-wire automotive system to dramatically reduce traffic accidents and gridlock on crowded freeways.

Celoxica, Calsonic Kansei Corp and researchers at Keio University have codeveloped a new drive-by-wire automotive system to dramatically reduce traffic accidents and gridlock on crowded freeways.

The system was designed using Celoxica's industry-leading, C-based electronic system level (ESL) design and synthesis solutions for use in onboard automotive intelligent transportation systems (ITS).

The system captures and identifies a vehicle in real time with more than double the performance, inherent adaptability and with lower power consumption than similar previous systems.

Using licence-plate recognition to calculate driving criteria such as distance and position the system allows the driver to maintain a safe distance from a car in front to reduce "tail-gating" and rear-end collisions.

The ultimate use of the technology is the possibility of autopiloting the car with the flick of a switch.

Once the majority of the cars in the world are so equipped, traffic will flow smoother, faster with fewer accidents and reduce automotive care and insurance costs.

"Our C-based design and synthesis technology is unlocking the potential of lower power, flexible FPGAs for next generation automotive electronics", said Colin Mason, VP Asia Pacific, General Manager and Representative Director, Celoxica Japan.

"C-based design is now the de facto enabling technology for rapidly accelerating complex custom algorithms in high performance silicon".

Recognition systems typically rely on sophisticated image processing algorithms running on high-end processors linked to a camera.

However the onboard, or in-car, constraints set by the project such as power consumption, heat and space meant a processor-based solution was impractical and due to rapidly changing standards in ITS, a custom ASIC was too expensive and inflexible.

The end solution was FPGA-based, with the algorithm parallelisation, acceleration and implementation made possible using the Celoxica DK Design Suite.

Connected to a car mounted CCD (charge-coupled device) camera, total processing time that included intensity conversion and colour sorting was reduced form 21.56ms to only 10.0ms.

"Applying recognition processing into automobiles requires low to medium volume, low power and rapid design to support the wide variety of chip types needed to meet the characteristics of different cars", said Masatoshi Arai, Manager, Advanced Engineering Development Group, Calsonic Kansei Corp.

"To meet these requirements FPGAs are a better choice than ASIC and the DK Design Suite provided a distinct advantage by helping us to quickly design and implement the different design parameters needed by the project".

"The automotive industry is seeing an explosion in the number of electronic devices and solutions needed to meet customer demand, expectations and safety regulations".

"Because of the complexity involved and the unique constraints of in-car electronics it is critical that designers can quickly exploit the potential of FPGAs and low-power, high-performance flexible hardware", said, Professor Hideharu Amano, Keio University.

"Our research demonstrates that by combining parallel reconfigurable architectures with design entry and implementation that is above RTL, existing automotive designers can move into new silicon paradigms and quickly implement systems that out perform traditional solutions in terms of power, performance and time to market".

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