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Product category: Design and Development Hardware
News Release from: Celoxica | Subject: SOPC Accelerator Kit
Edited by the Electronicstalk Editorial Team on 04 April 2006

Kit accelerates programmable SoC
development

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The SOPC Accelerator Kit provides a complete off-the-shelf solution harnessing the ease-of-use and productivity benefits of C-based design for Altera SOPC technology.

Celoxica has introduced its latest system level design kit for developers of complex digital-image and signal-processing applications A dividend of the long standing technical collaboration between Altera and Celoxica, the SOPC (system-on-programmable-chip) Accelerator Kit provides a complete off-the-shelf solution harnessing the ease-of-use and productivity benefits of C-based design for Altera SOPC technology

Included in the SOPC Accelerator Kit are more than 140 parameterisable digital-video/image-processing IP cores from Celoxica's PixelStreams library, API standards for processor integration and platform abstraction, a comprehensive mix of Altera and Celoxica design software and a Stratix II FPGA development platform.

Using Celoxica's DK Accelerator tool, designers can program the FPGA directly from software models and integrate Nios II processor cores with hardware logic.

Custom logic blocks and custom instructions can be created as library components from C algorithms and automatically integrated into a system.

Design time and effort that was previously focused on integration can now be applied to algorithm optimisation and product differentiation.

"By creating an environment for stronger partnerships with specialist system-level vendors, we can accelerate the deployment of designs that integrate FPGA logic with microprocessors and DSP", said Jim Smith, Director of EDA relations for Altera.

"Celoxica has the track record and unique capability to provide application IP and an end-to-end C-based design flow that adds value to the Altera development tools already used by thousands of our customers".

The RC250 development platform supplied with the kit features a 9M-gate Stratix II device and is provided with full board-support libraries.

Hardware peripherals include DVI, S-Video, dual gigabit Ethernet, integrated dual CMOS cameras and TFT touch screen.

DK Accelerator's system design capabilities include: an integrated development environment for C-based design entry; fast cycle-accurate simulation and debugging; mixed language co-simulation including Matlab and RTL; Nios II codesign support; automated SOPC Builder component integration and direct synthesis to Altera EDIF or RTL VHDL and Verilog.

"It's clear that domain knowledge is not usually in the same person as the structural hardware knowledge and it is these domain experts who want to accelerate their software algorithms using FPGA-based coprocessors", said Chris Sullivan, Director of Strategic Marketing for Celoxica.

"By enabling FPGAs to be software programmable they are more accessible to the embedded design community and deliver dramatic improvements in overall system performance and design productivity".

The SOPC Accelerator Kit is available immediately and ships with comprehensive design solutions from Celoxica, and Altera OEM design solutions including SOPC Builder, Nios II and Quartus II.

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