Product category:
Design and Development Hardware
News Release from: Celoxica | Subject: HPC Development System
Edited by the Electronicstalk Editorial
Team on 25 April 2006
Workstation helps explore FPGA
coprocessing
A computing workstation couples the AMD Opteron processor with a dynamically reconfigurable coprocessor module populated with Virtex-4 FPGA devices.
Celoxica and DRC Corporation have developed a computing workstation that couples the AMD Opteron processor with a dynamically reconfigurable coprocessor module manufactured by DRC and populated with the award-winning Virtex-4 FPGA device from Xilinx This high-performance computing development system combines the power of FPGA coprocessing with the productivity and ease-of-use of a software compilation flow
This article was originally published on Electronicstalk on 6 Feb 2001 at 8.00am (UK)
Related stories
FPGAs updated over the web
Celoxica has announced the DK1 design suite, software that enables a fundamentally new approach to the design of electronic hardware.
Celoxica offers a free go at FPGA design
Celoxica DK1 Eval is a free evaluation version of the Celoxica DK1 design suite that is restricted to compilations for simulation only, with no EDIF or VHDL output capability.
Software compilation technology from Celoxica is used to program the FPGA in the DRC coprocessor module.
The module is connected directly to the native HyperTransport technology interface for low-latency operation and resource sharing between the AMD Opteron processor and DRC's coprocessor.
This innovative combination provides an alternative architecture for processor augmentation by exhibiting as much as 300x performance improvement over software-only solutions while lowering power and heat requirements.
Further reading
Design suite extended to latest FPGAs
Celoxica has extended its DK1 design suite for the rapid design of reconfigurable hardware to support Xilinx Virtex II customers.
Board helps with small to medium FPGA prototyping
New from Celoxica, the RC100 stand-alone development board provides a rapid prototyping platform for small- to medium-sized FPGA designs.
PAL simplifies FPGA application interfacing
Celoxica has announced its platform abstraction layer (PAL) strategy for FPGA and system independent reconfigurable designs.
Previous attempts to offload processing into parallel and programmable hardware architectures have been hampered by price, performance, and capacity barriers as well as the lack of software programming tools.
As discussed in a joint presentation from AMD, Celoxica, and Xilinx at the Embedded Systems Conference in San Jose earlier this month, the current generation of FPGA, interconnect and software compilation technologies have overcome these barriers, resulting in the availability of solutions such as this computing development workstation.
"The DRC coprocessor module coupled with the AMD Opteron processor with direct connect architecture establishes a cost-effective, accelerated-computing platform", said Randy Allen, Corporate Vice President, Server and Workstation Division, AMD.
"With the easy-to-use programming environment from Celoxica, programmers can now realise compelling economic and technological advantages of hardware acceleration".
"DRC has developed unique patented technology to let the programmable hardware communicate in a true tightly coupled coprocessing environment with the system processors", said Larry Laurich, President and CEO of DRC Computer Corporation.
"With the Celoxica software tools, the user can easily choose the best processing environment for each part of their algorithm to achieve the highest possible performance in the most cost-effective implementation".
The HPC Development System available from DRC and Celoxica is a platform for exploration of applications for FPGA coprocessing.
Each workstation contains a motherboard with a dual-core AMD Opteron processor and a DRC coprocessor module, and each system includes the Celoxica design environment for programming the FPGA from software algorithms.
The systems are complete with DDR memory, disk drive and a graphics controller.
Models and prices vary based on the amount of memory, and the number, speed and size of the processors and re-configurable modules.
Customers may use this system to process their algorithms, or may explore the system off-load performance to design their own custom configuration.
"The DRC and Celoxica acceleration platform leverages the enormous potential of Virtex-4 FPGAs as a coprocessor to industry-leading general purpose processors like the AMD Opteron processor".
"Algorithms embedded in large applications can be greatly accelerated to improve the overall compute performance for systems in many different markets such as scientific and medical imaging", said Krishna Rangasayee, Senior Director of Vertical Marketing and Partnerships at Xilinx.
Phil Bishop, CEO for Celoxica said: "Celoxica and DRC have combined state-of-the-art processors, programmable hardware, high-speed interconnect, and software compilation technology to deliver high-performance accelerated computing for applications that were never able to take advantage of hardware processing before".
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