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Product category: Design and Development Hardware
News Release from: ChipX | Subject: CX6100 PCI Express Development Kit
Edited by the Electronicstalk Editorial Team on 09 June 2006

Structured ASIC development takes PCIe
onboard

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A new development kit for the CX6100 family of structured ASICs helps designers lower their design risk, reduce verification time and dramatically shorten their development cycle.

ChipX has a new development kit for the CX6100 family of structured ASICs By integrating the same PCI Express (PCIe) PHY used in ChipX's CX6100 structured ASIC family with a PCIe development board and FPGA, the development kit offers designers a new opportunity to lower their design risk, reduce verification time and dramatically shorten their development cycle

ChipX's kit differs from other PCIe development kits available today which use PHYs supplied by third parties that are not available in IP form for later integration.

"Once developers build their PCIe prototype in an FPGA, they must spend precious development time requalifying their design to migrate to lower cost structured ASIC or standard cell implementations", said Wouter Suverkropp, Director of Strategic Marketing at ChipX.

"By allowing developers to design and verify their initial PCIe prototype with the same PHY they will use in their final structured ASIC or standard cell implementation, our new development kit helps users lower their design risk and accelerate time to volume production".

The ChipX CX6100 development kit provides an ideal prototyping environment by supplying a development board with a CX6159 structured ASIC containing the ChipX PCIe PHY and PIPE gasket logic and an Altera Stratix FPGA.

The PCIe PHY supports high bandwidth applications through both x1 and x4 lane operation.

To initialise and control PHY parameters, the kit includes an I2C port and a Windows-based GUI supplied on a CD-ROM.

Designers can program a synthesisable PCIe controller, available from ChipX or a third party vendor, and customised logic, into the FPGA using standard Altera tools.

The board comes in the same dimensions as a standard PCIe card and can be easily operated for system integration, software codevelopment and validation testing through a standard PCIe edge connector.

Once prototype development is complete, designers can seamlessly map their custom logic, the PCIe controller and PCIe PHY into a single CX6100 structured ASIC without the migration issues normally associated with an FPGA-to-ASIC conversion.

Introduced in October, 2005, the CX6100 PCI Express structured ASIC family brings together a proven PCIe PHY and a configurable and synthesisable controller into a single optimised structured ASIC platform.

The CX6100 family is fabricated in ChipX's fine-grain and silicon-proven X-Cell architecture, which is designed to deliver higher gate densities and lower device costs than comparable programmable devices in smaller geometries.

Gate counts range from 240,000 to 1.8 million ASIC gates and memory densities run up to 1.8Mbit.

The product family supports operating frequencies up to 300MHz.

Four on-chip, configurable, low-jitter PLLs support output frequencies from 10MHz to 1GHz.

The CX6100 PCI Express Development Kit with PCI Express PHY is sampling immediately.

It will be in full production by Q3 2006.

Cost is $3995 in single quantities, including hardware and software.

ChipX is also offering a PCIe controller in IP form as an option.

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