Product category:
Design and Development Software
News Release from: CoWare | Subject: ConvergenSC
Edited by the Electronicstalk Editorial
Team on 12 May 2003
System-level design takes advantage of
SystemC
The ConvergenSC product family is the EDA industry's first system-level design solution using a common infrastructure for both design and verification, built expressly for SystemC.
The ConvergenSC product family is the EDA industry's first system-level design solution using a common infrastructure for both design and verification, built expressly for SystemC Leveraging insight gained from its global customer base and its leadership in the development of the SystemC standard, CoWare created ConvergenSC (pronounced convergency) to integrate multidisciplinary requirements of SoC designs
This article was originally published on Electronicstalk on 24 Jan 2006 at 8.00am (UK)
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CoWare has announced a new standards-based modelling solution for platform-driven ESL design with the new release of CoWare ConvergenSC.
Design environment supports MIPS-based family
CoWare is working with PMC-Sierra to provide an electronic system-level design solution for customers designing products based on PMC Sierra's RM7900 family of MIPS-powered processors.
System architects, platform and intellectual property (IP) developers, and system integrators now have a SystemC-based environment to rapidly create optimal, differentiated SoC designs.
Embedded software developers are able to validate their software on a model of the silicon using the SystemC transactional prototype created using ConvergenSC.
"The big opportunity for SoC designers is to differentiate their products by making the optimal architecture choices for their target market", says Mark Milligan, CoWare's Vice President of Marketing.
Further reading
Tools support latest SystemC
CoWare has committed to support the newly released SystemC 2.1 language reference manual (LRM) as it becomes standardised by IEEE P1666.
SystemC IP library gains ARM peripherals
CoWare has made a major expansion of its ConvergenSC Model Library with the addition of ARM PrimeCell peripherals.
Virtual platforms speed Oki SoC development
Oki Electric has developed a system level SoC verification methodology for its uPlat development platform using the SystemC-based ConvergenSC SoC design environment from CoWare.
"With ConvergenSC, CoWare is first to market with a SystemC solution specifically tailored to making the best design decisions and validating them in a complete system environment including software".
The first product announced in the ConvergenSC family, System Designer, enables convergence of system architecture design and verification.
It shaves development time by providing high-speed simulation, architecture analysis, and design implementation on a single SystemC-based infrastructure.
Capabilities include: creation of a SystemC transactional prototype for SoCs containing multiple processors, complex busses, memories, custom logic and embedded software; unmatched simulation performance using an all-new, fully compliant, SystemC simulation architecture, running up to five times faster than the Open SystemC Initiative (OSCI) SystemC reference simulator; and unique analysis capabilities to create optimal design architectures, including bus views showing occupancy, transactions and contention, memory views showing cache hits and misses, and embedded processor views showing processor usage for software tasks or functions.
SystemC transactional prototypes enable SoC architecture decisions, such as hardware/software partitioning, processor selection, coprocessor design, and bus architecture, to be made early in the development process.
These decisions have greater impact on a products market success compared to downstream implementation efforts.
Using high-speed simulation performance, architecture analysis capabilities, and tools to quickly change the design, multiple architectures may be evaluated in the system environment to determine the optimal configuration.
These SystemC transactional prototypes execute fast enough to boot larger real-time operating systems (RTOSs), such as embedded Linux, and can be used for software development, comprehensive system integration, and hardware design verification.
Because ConvergenSC is fully compliant with the OSCI SystemC standard, any IP models created to SystemC specifications run correctly within the ConvergenSC environment.
For maximum performance, commercial and custom processors are easily modelled using CoWare's Lisatek software.
Additionally, transactional bus simulators are available from CoWare to provide baseline configurations of popular bus standards such as Amba.
Third-party EDA tool support includes Novas Debussy debug system and HDL cosimulation using Cadence's NC-Sim and Synopsys VCS.
CoWare's ConvergenSC System Designer product will be available in June 2003.
A stand-alone version of the high-performance SystemC simulator, called ConvergenSC System Verifier, is available immediately.
All run on Sun Solaris and Linux operating systems.
Current CoWare N2C System Designer customers may upgrade to ConvergenSC System Designer at no charge.
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