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Product category: Design and Development Software
News Release from: CoWare | Subject: ESL design
Edited by the Electronicstalk Editorial Team on 26 May 2004

Electronic system level design at DAC

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CoWare will showcase its latest technologies and products for electronic system level design at the Design Automation Conference next month in San Diego, California.

CoWare will showcase its latest technologies and products for electronic system level (ESL) design - including tools for hardware/software codesign, architecture of optimised SoC platforms, creation of embedded processors, and DSP algorithms - at the Design Automation Conference (DAC) next month in San Diego, California The company will also offer ESL and SystemC-focused seminars, panels, paper presentations and events at the conference

"Due to complexity and embedded software, design is fundamentally changing and moving to ESL", said Mark Milligan, Vice President of Marketing at CoWare.

"To increase awareness of the benefits of ESL design and verification, CoWare will take part in the official DAC programme, and we have also added significant programming of our own this year".

"Attendees should be on the lookout for buttons that read 'ESL now!' available from CoWare and other companies involved with ESL".

"By wearing the buttons, attendees can help spread the word about ESL, and also win cash".

Delegates can register to attend two one-hour mini-seminars, given in the CoWare suite at various times throughout the conference.

"SystemC and TLM: learn from the experts" is a mini-tutorial that will help delegates understand transaction-level modelling (TLM), including information about the new OSCI standard and the ESL solutions that can be built from it.

Technical experts from the OSCI TLM working group will be on hand to answer questions.

"Application-specific instruction-set processors (ASIPs): what are they and why are they important for SoC design?" will address how ASIPs can add flexibility and reduce risk compared to fixed hardware, as well as help reduce power and time to market, increase performance, and improve hardware and software re-use.

In the CoWare booth, number 1844, delegates can see demonstrations of CoWare's leading ESL design tools, including the latest releases of its ConvergenSC system-level design solution - featuring the industry's fastest SystemC simulator -and the LISATek suite of tools for embedded processor modelling, design, and software tool generation.

There will also be a demonstration entitled "ConvergenSC ESL design-for-verification" featuring the latest integration between the ConvergenSC and Cadence Incisive products.

Delegates can also talk to an expert about this integration in the Cadence booth, where CoWare will be participating in Cadence's "Tech Talk" sessions.

Delegates can stop by the CoWare booth theatre to learn about ESL solution flows and the ESL ecosystem, featuring presentations from CoWare and its CoTeam partners.

Every theatre presentation delegate will receive a gift and have the opportunity to be entered into a daily drawing for an Apple iPod.

Delegates can also register to see several additional demonstrations of CoWare's tools and integrated flows available in the CoWare suite.

CoWare and Cadence are sponsoring an ESL Design and Verification Breakfast on Wednesday 9th June from 0730 to 0900 local time in the Convention Centre room 24ABC.

At the event, experts will discuss worldwide economic and technological pressures driving adoption of ESL methods for design and verification.

Representatives of major companies that have already made the move to ESL will discuss their experiences.

In "Competitive strategies for the electronics industry", Alan Naumann, CoWare President and CEO, will moderate a DAC Business Track Panel session on remaining competitive in today's economy.

This session will examine globalisation, patents, intellectual property management, and strategic marketing.

Each talk will cover a broad spectrum of approaches applicable to design, EDA, and IP-based companies.

Other CoWare-sponsored events and tutorials include: the SystemC technology symposium entitled "System-level design 2004: here and now"; the first annual meeting of the North America SystemC Users Group (NASCUG); and a tutorial on "System-level power management", cosponsored by ChipVision and PowerEscape.

In addition to these panel presentations and events, CoWare will present two technical papers during the conference, entitled "A novel approach for flexible and consistent ADL-driven ASIP design" and "Heterogeneous MP SoC - the solution to energy efficient signal processing".

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