Software simplifies comms line card development

The latest release of Cypress Semiconductor's popular Warp software design tools now includes support for its recently announced Programmable Serial Interface family of communications devices.

The latest release of Cypress Semiconductor's popular Warp software design tools now includes support for its recently announced Programmable Serial Interface (PSI) family of communications devices.

Warp Release 6.1 also extends its Unix support to include Cypress's Delta39K complex programmable logic devices (CPLDs) on Sun's Solaris 8 operating system.

Warp Release 6.1 now supports Cypress's full range of programmable logic offerings, from simple PLDs to the high-density Delta39K family.

With support for the PSI family, Warp Release 6.1 offers a comprehensive design, development, synthesis, and simulation environment for integrated SERDES and programmable logic chip solutions.

Warp software provides a seamless programming interface for designers to easily integrate custom IP with the SERDES via VHDL or Verilog blocks, text or graphical state machines.

"Warp Release 6.1 allows designers to take advantage of the advanced features of PSI devices", said Trevor Davis, Cypress's software product manager.

"As a result, Warp Release 6.1 significantly simplifies communications line card development by reducing the complexity of board-level simulation and chip-to-chip communication simulation".

Cypress continues to offer a value-driven $99 edition of Warp Release 6.1, along with two editions that provide additional design functionality.

In addition, Cypress offers an industry-leading value by providing customers with free technical support and upgrades for life.

Warp Release 6.1 is available now.

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