Nexsan opts for Cypress CPLD

Nexsan Technologies has chosen the Delta39K CPLD from Cypress Semiconductor for its new InfiniSAN ATAboy storage solutions.

Nexsan Technologies has chosen the Delta39K CPLD from Cypress Semiconductor for its new InfiniSAN ATAboy storage solutions.

The deterministic timing and abundant high-speed memory of Delta39K CPLDs are the key differentiators from other programmable logic solutions in the market that made Nexsan select these CPLDs.

InfiniSAN ATAboy2, the ATA disk-based RAIDs, recently won an award for 'best enterprise storage' at COMDEX Fall 2001.

The ATAboy2 products are ATA disk-based RAID for storage area networks (SAN), network attached storage (NAS) or disk attached storage (DAS) environments and provide enterprise-class features and functionality in a low-profile cost-correct, expandable package.

The innovative ATAboy architecture provides a performance boost with the increase in drive density, leveraging Nexsan's proprietary ATA silicon on its own RAID controller to scale up data throughput.

Instead of opting for the conventional design of putting dual ATA drives on each bus, the Nexsan design allocates a private bus for each of the 14 ATA drives, generating improved data throughput, improved reliability and the ability to hot-plug each individual drive.

Nexsan's ATAboy2 ATA disk-based technology provides "next generation" performance, reliability and high data availability for the most demanding storage and data-delivery applications.

The Delta39K family - 3x the density of any other CPLD in the market plus 480Kbit of embedded RAM - spans five device densities, ranging from 30,000 to 200,000 gates.

Embedded dual-ported and FIFO memories allow buffering of large amounts of data and enable interfacing systems to operate in two independent clock domains.

"The combination of Cypress's PLD expertise with Nexsan's storage solution expertise is resulting in high performance and extremely reliable products in SAN, NAS and DAS markets", said Geoff Charubin, director of marketing for Cypress's data communications division.

"We are pleased that Nexsan's ATAboy2 products have been recognized by industry experts for their advanced capabilities, and Cypress is proud of the role it played in making these products possible.

The Delta39K CPLD family combines the high speed, predictable timing, and ease-of-use of a CPLD with the high density and low power of an FPGA, providing a great alternative to PLD customers like Nexsan".

"By partnering with an industry leader like Cypress, Nexsan is able to present an attractively priced solution with all the features required in enterprise applications", commented Martin Boddy, managing director at Nexsan.

"The Delta39K's abundant memory makes it an optimal solution for our ATAboy2 family of products.

The fact that it does exactly what's stated on the datasheet was a pleasant surprise and helped tremendously in reducing the design cycle time".

Delta39K CPLDs are offered with a pin-to-pin propagation delay as low as 7ns and true in-system performance in excess of 233MHz.

Each device in the Delta39K family includes a programmable, Spread Aware phase locked loop (PLL) - with unmatched multiply, divide and clock edge control options - that provides four global clocks to all logic clusters, memories and I/O cells to maintain precise on- and off-chip timing.

Innovative options include the Self-Boot package, a solution that embeds non-volatile Flash memory die with the Delta39K die creating a unique non-volatile solution and eliminating the need for an external boot PROM.

The Delta39K architecture consists of logic block clusters (LBCs), each of which has 128 macrocells - eight 16-cell macrocell logic blocks - connected by a Programmable Interconnect Matrix (PIM).

Each LBC has 16Kbit of single-port SRAM cluster memory, configurable as synchronous or asynchronous and as x1, x2, x4 or x8.

The cluster memory can be cascaded with other cluster memory blocks to implement wider and deeper memory functions.

In addition to cluster memory blocks, each LBC has an associated channel memory block.

The 4Kbit channel memory uses Cypress's true-dual-ported cell to offer optimised dual-port and FIFO memory with completely independent write and read clocks.

Each channel memory block includes FIFO control and the dual-port arbitration logic needed to implement extremely fast and powerful specialty memory functions.

The Delta39K device offers FIFO performance as high as 200 MHz.

The channel memory, like the cluster memory, is configurable as x1, x2, x4 or x8 and its width and depth can be expanded.

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