Distribution buffers offer wide frequency range

A Cypress Semiconductor product story
Edited by the Electronicstalk editorial team Oct 9, 2003

Two high-performance zero delay buffers feature a guaranteed total timing budget window.

Two high-performance zero delay buffers feature a guaranteed total timing budget (TTB) window.

The CY23020 clock distribution devices have the lowest TTB, which embodies the maximum variation in jitter, output-to-output skew, and phase error of any comparable device on the market, making them ideal for use in switches, routers, basestations and high-end servers.

As systems become more complex, the need for high performance signal distribution devices becomes more pronounced.

Designers are burdened with calculating the timing error from parameters listed in the datasheet including skew, jitter, and phase error.

The CY23020 zero delay buffers reduce the burden by specifying a single parameter that guarantees a maximum TTB across variations in output frequency, supply voltage, operating temperature, input-edge rate and process.

The CY23020-1 features the industry's lowest TTB at 335ps maximum, whereas the CY2303 provides 400ps maximum TTB.

"We've reduced user input to a single entry and minimised total timing budget impact by simplifying clock tree design", said Tunc Cenger, Marketing Manager for Cypress's Timing Technology Division.

"The CY23020 provides designers with a more accurate means of calculating TTB, which has led to significantly higher performance clock schemes".

The CY23020-1 is a 200MHz PLL-based zero delay buffer designed for high-speed clock distribution applications.

The CY23020-3 is a 400MHz PLL-based zero delay buffer with differential outputs and an aggressive jitter specification of 15ps RMS, which makes it suitable for a variety of communication applications that require low noise.

Both devices cover a wide range of communication and computation frequencies, the CY23020-1 supports frequencies from 50 to 200MHz whereas the CY23020-3 operates from 100 to 400MHz.

In addition, both CY23020 devices have options to multiply the reference clock signal by two and bypass the PLL to be used as fan-out buffers in system test mode.

The CY23020-1 is available now in either a 48-pin TSSOP or 48-pin QFN package.

The CY23020-3 is available now in a 48-pin QFN package.

Prices range from $7.25 to $8.35 per unit in 25,000-unit quantities.

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