Product category:
PCB Assembly Equipment and Tools
News Release from: DEK | Subject: DirEKt Ball Placement
Edited by the Electronicstalk Editorial
Team on 27 November 2002
Inline technology aids wafer-level
processing
Neil MacRaild of DEK explains how back-end packaging processes and technology must become more flexible for manufacturers to produce today's advanced packages at commercial prices.
Packaging and interconnection have a crucial impact on how fully the power of today's deep-submicron silicon can be accessed and exploited Not only must packaging offer sufficient electrical performance, it must also deliver it at low cost if the cost advantages of deep submicron fabrication are to be maximised
This article was originally published on Electronicstalk on 15 Jul 2005 at 8.00am (UK)
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Mass imaging turns to ball placement
DEK has developed breakthrough wafer bumping and ball placement solutions for today's most demanding packaging applications.
Process achieves better than 99% first-pass yield
A variety of advanced process technologies developed by DEK offer significant performance and cost advantages for semiconductor packaging.
There is much current interest in chip scale packaging, defined as an encapsulation no more than 20% larger than the chip itself.
One of the most popular is the wafer level CSP, or WL-CSP; solder bumps are deposited directly onto ohmic contacts on the silicon wafer before the assembly is reflowed to create a firm mechanical and electrical interface ready for placement of the component in an automated surface mount assembly environment.
The package eliminates the gold bond wires that traditionally make the connection between the die and a separate lead frame.
Further reading
Print platforms add features and performance
DEK has added a number of performance and productivity improvements to its Horizon product line.
Screen service provides fast delivery
Manufacturers of PV cells can combine DEK's precision screens with printers from DEK or third-party suppliers.
Printing system upgrades materials deposition
Enclosed head printing provides exceptionally efficient materials transfer, superior throughput rates, higher process yields, lower material consumption and improved process control.
The solder bumps may be deposited on the wafer surface as pre-formed solder balls or as bricks of solder paste.
There are several ways to achieve this, and one of the challenges facing developers of WL-CSP and other flip chip techniques is to deliver the package advantages in a process that is compatible with high volume manufacturing.
Wafer bumping can be achieved using sputtering or electroplating processes, but these require specialised, high value equipment and electroplating is a wet process that requires variable current control throughout the procedure to achieve an optimum deposit profile.
It also requires photoresist imaging and cleaning stages as part of the process, which add complexity, introduce a number of control issues and are difficult to build into an inline production facility, requiring significant operator intervention before successfully bumped wafers can be delivered to back end processing.
Alternatively, mass imaging of material is capable of depositing solder bumps with sufficient accuracy offer the opportunity to create an automated process flow more easily, using equipment that leverages technologies already in service with most of the world's surface mount board assemblers.
In wafer level applications, the technique offers potential savings in capital investment and process footprint, and is also easily changed from solder ball placement to solder paste imaging quickly and at low cost.
This flexibility allows manufacturers, who may be contract packaging specialists, to change over quickly to produce a range of different CSP styles.
Importantly, the cost structure and flexibility of mass imaging also allows today's electronic manufacturing services businesses to integrate wafer level processing into existing, inline SMT assembly capabilities.
DEK has developed equipment and processes for inline wafer level and substrate level processing, and was presented with the Vision award at Semicon West 2001 as a result of this work.
As this equipment is entering service with component manufacturers and packaging specialists around the world, it is possible to assess the value of mass imaging to customers seeking a manufacturable solution to the demand for advanced semiconductor packages.
A suitable solution to solder ball placement is required at the wafer level and also at the substrate level to enable a viable flip chip process.
When reflowed, solder balls at the wafer level are responsible for attaching the upside down bare die to the substrate.
First, flux is deposited at each interconnect location.
Using DEK's 30 years experience in perfecting highly accurate screen printing for 6-sigma processes in SMT manufacturing, a highly controlled, highly accurate flux deposition process is possible.
Then, using enclosed head imaging based on DEK's ProFlow DirEKt Imaging process, solder balls at diameters from 0.3 to 0.75mm can be placed directly in precise locations on the wafer as defined by the stencil apertures.
The ProFlow derived head provides the means to control the delivery of solder balls to the stencil surface.
The relative lack of friction compared with a gravity feed process means solder balls arrive in perfect condition, not damaged or misshapen.
Moreover, the DirEKt Ball Placement transfer head ensures that each node in the grid array is populated with a single solder ball; nothing is left to chance, as with the gravity process.
The solder ball is also seated firmly in the flux deposited during the first stage process, under a controlled deposition force exerted continuously by the transfer head.
This process can successfully place solder balls at the wafer level for creation of WL-CSP packages.
The entire process, including the pair of imaging machines, can be purchased at lower cost than a dedicated ball placement machine.
It occupies a smaller footprint on the shop floor and achieves higher first pass yield without rework.
According to specialist contract packaging businesses, which are familiar with the economic realities of the issues, the cost of rework is a significant factor influencing the total cost of ownership.
DirEKt Ball Placement is therefore able to offer an extremely viable way to place solder balls.
But the concept has another important advantage: it is extremely easy and cost effective to change over from solder ball placement to solder paste deposition as a means of bumping the wafer.
The ability to change over from solder ball placement to solder paste deposition allows a contract wafer bumping business, for example, to offer greater capabilities to its customers, and to achieve a much faster return on its investment in capital equipment.
Moreover, as the technology surrounding wafer level and other advanced packaging styles continues to change rapidly, this flexibility is extremely valuable.
To achieve the target reflowed bump height in each case requires rigorous application of design rules when creating the stencil.
It is also necessary to pay careful attention to the design of bond pads, allowing sufficient contact area to achieve sufficient solder joint strength for a given standoff.
These are some of the issues DEK process specialists have solved in order to refine the process for production applications.
The result is a highly automated process featuring a wafer handling system that allows inline bumping with very low operator intervention.
The wafer handler was developed by DEK in conjunction with Adept Semiconductor Equipment Division of Livermore, California, and is a crucial element of the overall wafer bumping solution.
This process is currently in operation at specialist chip scale packaging businesses worldwide.
DEK has also developed dedicated ProFlow heads ideally suited to ultra-fine-pitch bumping using low alpha solder pastes.
As these are specialised, expensive compounds, the ability of the ProFlow technology to control handling and minimise deterioration and wastage delivers a valuable cost saving.
Placing solder balls on FR4 epoxy substrate is a further essential process for advanced packages such as flip chip and also system in package (SiP).
SiP has arrived as a new alternative to system on chip (SoC) fabrication of custom ICs.
It has emerged to support greater flexibility for system designers, who can implement a number of functional blocks on separate dice.
This allows systems to be fabricated on a mixture of processes, for example combining standard CMOS with a more exotic technology such as gallium arsenide (GaAs) or silicon germanium (SiGe) to maximise RF performance.
Using SiP, multiple dice can be packaged together on a single substrate to achieve high integration and low overall component count, with low interconnect density.
SiP may employ wafer level bumping to attach bare die to the substrate, with substrate level bumping providing interconnect to the board.
DEK's DirEKt Ball Placement process is equally applicable at the substrate level, and has been developed to allow processing of substrates in pallets, boats, strips or panels.
Again, first pass yield is very high, with the solder balls being handled significantly better than in traditional gravity feed equipment, the preliminary fluxing stage is extremely accurate, and the process is highly automated.
DEK customer Alpine Microsystems has recently entered volume production of SiP using mass imaging for wafer level and substrate level bumping.
Alpine's initial requirement was to achieve a higher level of automation than its existing process.
Using DEK's handling systems for wafers and substrates, combined with variants of the patented ProFlow head developed specifically to satisfy the unique requirements of solder bumping, the company has now implemented a flexible, in-line wafer and substrate bumping facility.
In practice, Alpine has also found that changeover and tooling costs are significantly lower than traditional, dedicated bumping systems.
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