<?xml version="1.0" encoding="iso-8859-1"?>
<rss version="2.0">
  <channel>
    <title>RSS News Feed for Denali Software - from Electronicstalk</title>
    <link>http://www.electronicstalk.com/news/deo/deo000.html</link>
    <description>Denali Software news releases on Electronicstalk</description>
    <language>en-gb</language>
    <copyright>Copyright (C)2008 Pro-Talk Ltd. All rights reserved.</copyright>
    <pubDate>Fri, 26 Sep 2008 08:00:00 UT</pubDate>
    <lastBuildDate>Fri, 26 Sep 2008 08:00:00 UT</lastBuildDate>
    <image>
      <title>Pro-Talk Ltd</title>
      <url>http://www.pro-talk.com/images/protalklogo90.gif</url>
      <link>http://www.pro-talk.com/</link>
      <width>90</width>
      <height>79</height>
    </image>
    <item>
      <title>Memory interface specs are upgraded</title>
      <description>Chip architects, memory controller vendors and PHY providers can use the new specification to speed their DDR memory system design and integration.</description>
      <pubDate>Wed, 21 May 2008 08:00:00 UT</pubDate>
      <category>Denali Software</category>
      <link>http://www.electronicstalk.com/news/deo/deo124.html</link>
    </item>
    <item>
      <title>Network processors accelerated to market</title>
      <description>IPs accelerate designers' ability to design in DDR2/3 and PCIe, lower their integration risk and speed their time to market for delivering their network processors in silicon.</description>
      <pubDate>Mon, 10 Mar 2008 08:00:00 UT</pubDate>
      <category>Denali Software</category>
      <link>http://www.electronicstalk.com/news/deo/deo123.html</link>
    </item>
    <item>
      <title>SoC platform allows performance tuning</title>
      <description>The FlashPoint platform uses a sophisticated design configuration engine that enables the system to be tuned for optimal performance</description>
      <pubDate>Tue, 29 Jan 2008 08:00:00 UT</pubDate>
      <category>Denali Software</category>
      <link>http://www.electronicstalk.com/news/deo/deo122.html</link>
    </item>
    <item>
      <title>Verification IP assures IC interoperability</title>
      <description>Denali Software's PureSpec verification IP has helped Staccato Communications find critical bugs in its RTL as well as several bugs in its vendor-supplied RTL IP.</description>
      <pubDate>Thu, 10 Jan 2008 08:00:00 UT</pubDate>
      <category>Denali Software</category>
      <link>http://www.electronicstalk.com/news/deo/deo121.html</link>
    </item>
    <item>
      <title>Licensing deal simplifies handheld devices</title>
      <description>Denali Software's NAND Flash solution is providing simplified system development and low development cost benefits to handheld manufacturers. </description>
      <pubDate>Thu, 03 Jan 2008 08:00:00 UT</pubDate>
      <category>Denali Software</category>
      <link>http://www.electronicstalk.com/news/deo/deo120.html</link>
    </item>
    <item>
      <title>Memory PHY reduces LSI design risks</title>
      <description>DDR2 SDRAM PHY design can be prototyped on the Xilinx Virtex-5 FPGA before progressing to Tokyo Electron Device ASICs.</description>
      <pubDate>Mon, 24 Sep 2007 08:00:00 UT</pubDate>
      <category>Denali Software</category>
      <link>http://www.electronicstalk.com/news/deo/deo119.html</link>
    </item>
    <item>
      <title>Companies collaborate on high-end memory</title>
      <description>The GDDR5 memory devices from Qimonda are designed to meet the high-performance requirements from graphic applications on game consoles, desktop PCs and notebooks. </description>
      <pubDate>Fri, 24 Aug 2007 08:00:00 UT</pubDate>
      <category>Denali Software</category>
      <link>http://www.electronicstalk.com/news/deo/deo118.html</link>
    </item>
    <item>
      <title>Memory controller IP cuts Flash system costs</title>
      <description>Next-generation high-speed BCH error correction code technology for NAND Flash memory claims order-of-magnitude performance improvement at lower costs.</description>
      <pubDate>Wed, 18 Jul 2007 08:00:00 UT</pubDate>
      <category>Denali Software</category>
      <link>http://www.electronicstalk.com/news/deo/deo116.html</link>
    </item>
    <item>
      <title>Memory controller enables high-speed networking</title>
      <description>BroadLight has used Databahn DDR memory controller IP in a wide range of end product designs, including high-speed networking applications.</description>
      <pubDate>Thu, 17 May 2007 08:00:00 UT</pubDate>
      <category>Denali Software</category>
      <link>http://www.electronicstalk.com/news/deo/deo115.html</link>
    </item>
    <item>
      <title>Verification IP confirms NIC compliance</title>
      <description>NetXen has used Denali's PureSpeed verification IP to demonstrate the compliance of its latest 10GbE intelligent network interface cards for blade, rack and tower servers.</description>
      <pubDate>Thu, 03 May 2007 08:00:00 UT</pubDate>
      <category>Denali Software</category>
      <link>http://www.electronicstalk.com/news/deo/deo114.html</link>
    </item>
    <item>
      <title>Verification IP automates manual register checks</title>
      <description>IP automates functional verification of configuration registers for system-on-chip designs.</description>
      <pubDate>Tue, 17 Apr 2007 08:00:00 UT</pubDate>
      <category>Denali Software</category>
      <link>http://www.electronicstalk.com/news/deo/deo113.html</link>
    </item>
    <item>
      <title>DDR memory used on multimedia chip</title>
      <description>Denali's Databahn memory system solution helps ODM's developers rapidly deploy mobile DDR memory systems in their chip for use in portable products.</description>
      <pubDate>Mon, 09 Apr 2007 08:00:00 UT</pubDate>
      <category>Denali Software</category>
      <link>http://www.electronicstalk.com/news/deo/deo112.html</link>
    </item>
    <item>
      <title>Toolkit verifies compliance and interoperability </title>
      <description>Software verifies compliance with the latest PLB specification and validates interoperability between the processor cores and integrated bus controllers.</description>
      <pubDate>Wed, 21 Mar 2007 08:00:00 UT</pubDate>
      <category>Denali Software</category>
      <link>http://www.electronicstalk.com/news/deo/deo111.html</link>
    </item>
    <item>
      <title>Mobile DDR memory-controller IP used in SoC design</title>
      <description>Global Unichip, a leading system-on-a-chip (SoC) design foundry, has used Denali Software's  Databahn mobile DDR memory-controller IP and PHY in a wide range of its end-product designs.</description>
      <pubDate>Wed, 21 Feb 2007 08:00:00 UT</pubDate>
      <category>Denali Software</category>
      <link>http://www.electronicstalk.com/news/deo/deo110.html</link>
    </item>
    <item>
      <title>Verification IP validates RAID interfaces</title>
      <description>LSI verification engineers depend on Denali's interoperable and high-quality verification solutions to deploy their PCI Express technology.</description>
      <pubDate>Wed, 14 Feb 2007 08:00:00 UT</pubDate>
      <category>Denali Software</category>
      <link>http://www.electronicstalk.com/news/deo/deo109.html</link>
    </item>
    <item>
      <title>PCI Express core works compliantly with NXP PHY</title>
      <description>The Databahn PCI Express (PCIe) IP core and NXP PCIe PHY PX1011A provide customers a silicon-proven PCIe solution which is version 1.1 specification compliant.</description>
      <pubDate>Thu, 08 Feb 2007 08:00:00 UT</pubDate>
      <category>Denali Software</category>
      <link>http://www.electronicstalk.com/news/deo/deo108.html</link>
    </item>
  </channel>
</rss>
