Product category:
Intellectual Property Cores
News Release from: Denali Software | Subject: Databahn IP
Edited by the Electronicstalk Editorial
Team on 05 August 2005
Memory controller IP aids SoC Flash
integration
Denali Software and Samsung Electronics are working to develop and deliver IP products that enable fast, efficient deployment of OneNAND interfaces for SoC designs.
Denali Software and Samsung Electronics are working to develop and deliver IP (intellectual property) products that enable fast, efficient deployment of OneNAND interfaces for system-on-chip (SoC) designs The first such product, Denali's Databahn OneNAND controller, is being introduced globally this month
This article was originally published on Electronicstalk on 8 Aug 2005 at 8.00am (UK)
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Memory controller IP supports encounter synthesis
Cadence Design Systems has announced support for Cadence Encounter RTL Compiler global synthesis on Databahn memory controller products.
The Databahn IP provides for efficient deployment of OneNAND memory by extending the read/write performance of OneNAND for designs of handsets and other embedded platforms that support synchronous burst NOR memory.
The Databahn OneNAND controller also will work with designs that do not support synchronous burst NOR.
Under terms of the agreement, Denali is charged with developing and supporting OneNAND Flash controller IP.
Further reading
PCI Express IP meets latest specification
Denali Software's PureSpec verification intellectual property (IP) and Databahn PCIe products fully support the recently announced PCI-SIG PCI Express Base 2.0 (Gen II) specification.
IP core meets latest PCIe specification
Denali Software's Databahn PCI Express IP core has successfully passed the latest PCIe specification compliance testing.
PCI Express core works compliantly with NXP PHY
The Databahn PCI Express (PCIe) IP core and NXP PCIe PHY PX1011A provide customers a silicon-proven PCIe solution which is version 1.1 specification compliant.
Samsung will have a limited number of the Databahn IP product available to its customers at no charge.
Customers also may purchase the Databahn OneNAND controller IP directly from Denali, as well as an integrated IP product, Dataplex (to be released next month), for controlling both OneNAND Flash and SDR/DDR DRAM.
Simulation models for OneNAND Flash devices and Databahn OneNAND controller IP are available today.
Denali's memory controller for OneNAND and DRAM optimises the data flow between OneNAND and mobile DRAM in multimedia handsets, the fastest growing mobile segment.
It enables demand paging with OneNAND as the unified storage device for both code and data.
"This collaborative effort between Denali and Samsung will provide a tremendous amount of value to anyone designing products for the consumer electronics industry", said Denali CTO Mark Gogolewski.
"Customers will now have access to high-quality IP that enables them to quickly deploy OneNAND memory in their product designs, and realise the maximum benefits of its unique architecture".
"With Dataplex, we are enhancing our integrated IP solution for OneNAND and various DRAM technologies to provide even more value in terms of optimising power, performance and overall system-level data flow".
"We are very pleased to be engaged with Samsung on this effort".
"Our goal is to enable customers to track the performance of OneNAND without leaving anything on the table, allowing customers to optimally differentiate their products, while accelerating the adoption of converged mobile solutions", said Jon Kang, Senior Vice President, Technical Marketing Group, Samsung Semiconductor.
"By working with Denali, we are providing customers with critical IP products for integrating OneNAND technology in order to extract maximum performance from their product designs".
In addition to its mobile DRAM and MCP products, OneNAND is a key part of Samsung's efforts to extend its leadership in the mobile convergence market.
Denali's proven Databahn IP technology has been used successfully in more than 150 DDR memory system designs, with 47 designs now in silicon.
Databahn provides designers with an integrated IP solution for off-chip memory and storage, including: SDRAM, DDR1/DDR2, mobile DRAM, OneNAND and SATA.
Supported by a robust configuration and verification environment, Databahn IP enables system designers to achieve maximum performance with minimum risk.
Deliverables include: register transfer level (RTL) and synthesis scripts, silicon-independent DDR PHY, verification testbench, static timing analysis (STA) scripts, documentation, and programmable register settings for power management, port arbitration, and vendor-specific device settings.
Databahn is library independent and supports from 0.18 to 0.09um technologies.
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