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Product category: Design and Development Hardware
News Release from: Direct Insight | Subject: Corelis PCIe-1149.1
Edited by the Electronicstalk Editorial Team on 27 July 2006

First PCI express JTAG boundary-scan
controller

Direct Insight has introduced a new PCI Express based boundary-scan test and in-circuit programming controller card.

Direct Insight has introduced a new PCI Express based boundary-scan test and in-circuit programming controller card The Corelis PCIe-1149.1 offers board testing and in-system programming of CPLDs, FPGAs, and Flash memories approaching their full theoretical programming speed

With its ability to deliver test vectors at a sustained test clock (TCK) frequency of 80 MHz, while simultaneously verifying results in hardware at each individual TAP, the PCIe-1149.1 is being offered as the premier solution for users whose applications demand the highest possible performance and scan vector throughput.

The Corelis PCIe-1149.1 is an intelligent boundary-scan controller that can be used in the testing of devices, boards, or systems, compliant with IEEE Std 1149.1.

The controller offers excellent performance due to its large array of performance-enhancing innovations that increase test vector throughput.

This product was designed to meet the needs of engineers in the lab or production environment who require faster and more efficient testing, programming and debugging of multiple UUTs (Units Under Test) or of a single UUT with multiple scan chains.

The PCIe-1149.1 plugs into the PCI Express slot in the computer and interfaces with the host computer via the PCI Express bus.

The host software then provides direct access to hardware for boundary-scan testing in various phases of a product life cycle such as design, manufacturing, and field service.

Boundary-scan test vectors developed with the Corelis ScanExpressTPG Test Program Generator can be executed directly on the PCIe-1149.1.

In addition to the boundary-scan test features, the PCIe-1149.1 also includes direct I2C and serial peripheral interface (SPI) based device programming capabilities.

The SPI and I2C interfaces are independent of the JTAG test interface, meaning the same boundary-scan controller tests the board and performs direct programming of serial EEPROM and flash memories, without operators having to remove the JTAG connector or switch to a dedicated SPI or I2C programmer.

The PCIe-1149.1 also features automatic signal delay compensation for long cable runs to the UUT; the ability to test the UUT for shorts between power and ground nets and the availability of eight analog channels for measuring target supply voltages or other signals up to +/- 50VDC. Request a free brochure from Direct Insight ...

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