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Product category: Networking Hardware
News Release from: Dynamic Engineering | Subject: IP-CAN
Edited by the Electronicstalk Editorial Team on 12 March 2008

Two independent CANs come together

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IndustryPack Module includes two channels of Controller Area Network.

Available now from Dynamic Engineering, IP-CAN is an IndustryPack Module with two channels of Controller Area Network Each CAN channel incorporates the SJA1000 and SJA1041 to provide BasiCAN and PeliCAN operation

Each channel is independent and can be programmed to run at different rates etc.

The design uses a Xilinx FPGA to provide the IP interface - IDPROM, bus interface, registers and control for the CAN controllers.

The CAN interface is performed in the memory space using an address bit to distinguish between the two channels.

Standard word based offsets are used to memory map the CAN interface into the IP space.

The bus interfaces between each of the CAN controllers and the FPGA are performed separately to allow for future features to be added and to allow completely independent operation.

The CAN controller is referenced to a 24MHz clock.

The clock is driven from the FPGA to allow the FPGA to use a rate doubled clock for internal timing synchronisation.

The conversion from IP to CAN and vice-versa is done with a minimum of delay using the higher reference clock.

The number of wait-states used is programmable based on the IP reference clock.

8 and 32MHz operation are supported.

For maximum efficiency the 32MHz rate is recommended.

All Dynamic Engineering carriers are programmable on a slot-by-slot basis for 8 and 32MHz operation.

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