Product category:
Design and Development Software
News Release from: Domain Technologies | Subject: MRAM8051 dev kit
Edited by the Electronicstalk Editorial
Team on 16 October 2006
MCU development runs from FPGA to ASIC
MCU netlist library and software development kit for use with Actel FPGAs includes a royalty-free licence to implement resulting microcontroller designs in a Tekmos merged ASIC.
Domain Technologies has the industry's first royalty-free synthesisable MCS8051 code-compatible microcontroller netlist library and software development kit for use with Actel FPGAs that also includes a royalty-free licence to implement resulting microcontroller designs in a Tekmos merged ASIC Implementing a customised 8051 microcontroller in an FPGA is still relatively expensive for volumes of 10,000 to 100,000 pieces
This article was originally published on Electronicstalk on 11 May 2004 at 8.00am (UK)
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So one of the unique features of the kit is a royalty-free licence to implement MRAM8051 designs in a Tekmos merged ASIC, enabling customers to realise substantial cost savings in low to medium production runs compared with FPGAs.
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Priced at under $5000, the netlist library is directly compatible with Actel's Libero Platinum and Libero Gold FPGA integrated development environment software, and includes Domain Technologies BoxView integrated development environment (IDE) and real-time debugging software, USB-powered MRAM8051 OLED development card with Freescale 512Kbyte magnetoresistive RAM, colour OLED graphic display driver C source code, and a bit mapped image transfer GUI that allows developers to easily transfer images directly into the MRAM8051 external data memory via the development card's USB-JTAG interface.
Directly compatible with device programming STAPL files generated by Actel Libero development environment, Domain Technologies BoxView debugger includes an integral STAPL player for programming the MRAM8051 OLED development card's ProASIC3 A3P250 FPGA using the development card's USB-JTAG interface.
Using the same interface, BoxView enables downloading and real-time debugging of application programs created using either the Keil C51 C compiler or Small Device C Compiler (SDCC).
For debugging MRAM8051 designs implemented in Actel FPGAs or Tekmos ASICs situated in other target hardware, BoxView supports the Actel FlashPro3 programming pod as well as Domain Technologies' own family of JTAG emulators.
Developed by Silicon Laude, the MRAM8051 synthesisable Verilog netlist library includes the SL8051 CPU core, standard MCS51 style serial port, parallel ports, counter/timers 0/1, interrupt prioritiser/controller, extended memory management unit, example Verilog test fixture, and Verilog RTL source code for the top level and user-modifiable SFR block incorporated in the MRAM8051 OLED reference design.
Based on Silicon Laude's proprietary, single-clock, hardware monitor and data exchange architecture, the core can be monitored and debugged in real-time via a JTAG interface, without the use of software monitor routines.
To support development of designs for use in Actel ProASIC3, Axcelerator, and RTAX radiation tolerant (space-grade) devices, three different versions of the netlist (one for each of the named Actel FPGA families) are provided with the kit.
The MRAM8051 gets its name from the unique ability to directly interface with Freescale's new 256K x 16bit MRAM device.
A single-user, MRAM8051 synthesisable microcontroller development kit for Actel FPGAs is priced at $4995 and is shipped within two weeks from receipt of purchase order.
The kit includes a 30-day, money-back guarantee and a royalty-free, annually renewable, BoxView IDE licence.
An evaluation SL8051 STAPL file and BoxView IDE for Actel's existing ProASIC3 evaluation board is available for free downloading from Domain Technologies' website.
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