Structured ASICs gain gigabit Ethernet option

Dynamically configurable trimode Ethernet MAC core will enable engineers to build robust Ethernet line card, NIC card or switching applications operating at 10/100 or 1000Mbit/s.

eASIC Corp and MoreThanIP have announced the immediate availability of a trimode (10/100/1000) Ethernet MAC core for eASIC's 90nm Nextreme Structured ASIC Family.

The dynamically configurable trimode Ethernet MAC core will enable engineers to build robust Ethernet line card, NIC card or switching applications operating at 10/100 or 1000Mbit/s (gigabit Ethernet).

As a new member of eASIC's eZ-IP Alliance, MoreThanIP will partner with eASIC to deliver UNH approved Ethernet solutions on Nextreme structured ASICs in order to provide system designers with the advantages of low unit-cost, no mask charges, and fast turnaround alternative to FPGAs and cell-based ASICs.

"The unique performance/power/cost capabilities provided by eASIC's Nextreme structured ASICs will enable us to expand the reach of our Ethernet solutions to new markets that could not be served by other custom ICs", commented Francois Balay, CEO of MoreThanIP.

"We are excited with the valuable contribution that MoreThanIP brings to our growing IP portfolio", said Jasbinder Bhoot, Senior Director of Marketing at eASIC Corporation.

"This partnership supports our continuous focus on delivering cost-effective, highly-desired IP cores to our customers".

"trimode Ethernet MACs are becoming increasingly popular as the industry moves towards digital processing of triple play applications".

"This Ethernet solution in combination with Nextreme will provide FPGA designers a compelling alternative to rapidly develop lower-cost, lower-power designs without adding design risk".

The 10/100/1000 MAC core operates full duplex mode, supports transparent mode (for switching applications) and full Ethernet frame termination/generation (for NIC or line card applications).

The trimode Ethernet MAC core seamlessly interfaces to any industry standard gigabit Ethernet PHY device.

MoreThanIP can also provide 1000Base-X PCS (physical coding sublayer) core and SGMII, RMII, RGMII, SSSMII modules to implements low pin count interfaces.

The standard definition synthesisable core is now available in VHDL, Verilog or netlist formats.

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