Cores come to structured ASIC portfolio

Tensilica and eASIC are working together to remove the cost barriers for developing custom embedded SoCs.

eASIC now provides free access to Tensilica's Diamond Standard microprocessor and DSP cores for its free-mask-charge no-minimum-order ASICs.

This combination enables embedded system designers to develop Diamond processor-based SoCs for applications in any production volume.

Designers will now be able to develop customised, highly differentiated ASIC solutions at a lower cost than FPGA-based embedded systems.

Tensilica's processors range from a very small, low-power 32bit controller up to the industry's highest performance digital signal processing (DSP) core and a multifunction audio processor that has been designed into millions of cellular phones.

The Diamond Standard family includes: the 106Micro the industry's smallest cachless, 32bit RISC controller core; the 108Mini a small cachless 32bit RISC controller with built-in DSP capabilities; the 212GP a flexible mid-range 32bit RISC controller; the 232L a mid-range 32bit CPU with memory management unit (MMU) for Linux OS support; the 570T a high-end 32bit CPU core; the 545CK a high performance DSP core; and the 330HiFi a low-power, 24bit audio DSP processor supported with popular audio and speech codecs.

The Diamond Standard family covers the broadest range of performance of any embedded computing architecture and the processors are supported by an optimised set of Diamond Standard software tools and an extensive ecosystem of industry infrastructure partners.

The Diamond Standard family is available to eASIC's customers via the company's eZ-IP Alliance programme.

"Free Tensilica processors on zero-mask charge structured ASICs is revolutionary breakthrough in reducing the upfront costs for customers looking to develop low-cost custom embedded processing systems at any volume", says Jasbinder Bhoot, Sr Director, Marketing at eASIC Corporation.

"This partnership is proof that a new era of system on a chip is on us".

"No upfront cost and no minimum order quantity for an embedded processor core on a high-performance and volume-capable ASIC".

"Several of our customers have been attracted to eASIC's Nextreme structured ASICs for fast prototyping or mass production", says Chris Jones, Tensilica's Director of Strategic Alliances.

"eASIC's structured ASIC technology offers customers a lower power, higher density solution than FPGAs at a much lower cost and faster time to market than cell-based ASICs".

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