Japanese success for netlist reduction tool

The Jivaro netlist reduction tool from Edxact has been chosen by one of Japan's leading worldwide suppliers of semiconductor devices.

The Jivaro netlist reduction tool from Edxact has been chosen by one of Japan's leading worldwide suppliers of semiconductor devices.

According a three-year agreement, Jivaro will be integrated into the company's verification flow for high density IC designs.

Jivaro innovative tools apply user-controllable model order reduction techniques on huge parasitic data files obtained from layout extraction tools, before feeding them to simulation tools.

Thanks to Jivaro, developers are now able to continue to use their existing simulation tools for new designs that otherwise would have been much too large.

Jivaro's technology achieves dramatic speed improvements with maintained accuracy, which is mandatory for backend verification flows.

"This is our first inroad into the Japanese market, and we are looking forward for further success, thanks to the experience of Marubeni Solutions Corporation, our distributor in Japan", said Mathias Silvant, Edxact President.

"Our tools have now been chosen by companies in Europe, in the USA and in Asia, and they are integrated into verification flows for SoC design, memory design as well as processor design".

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