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Platform tackles Australian ASIC bugs

An Emulation and Verification Engineering (EVE) product story
Edited by the Electronicstalk editorial team May 27, 2003

Canon Information System Research of Australia has chosen the ZeBu verification platform to verify and debug a new line of ASICs.

Canon Information System Research of Australia (CISRA) has chosen ZeBu, EVE's revolutionary verification platform, to verify and debug a new line of ASICs.

CISRA evaluated ZeBu over a one-week period, using existing designs.

ZeBu was used to cosimulate hardware description language (HDL) testbenches, reducing regression testing time.

CISRA is now migrating HDL testbenches into C++ transactors with ZeBu.

At the end of the evaluation, CISRA's Principal ASIC Engineer concluded: "We have been extremely happy with ZeBu's results.

Two of the most important aspects in our decision were ease of implementation and debugging.

ZeBu offers both with seamless software and advanced debugging capabilities, enabling full internal state access during execution".

ZeBu - or zero bugs - is a hardware platform used to accelerate the verification process of ASIC designs, FPGA-based prototypes and the software development cycle for SoC designs.

Installed on a designer's desktop, it offers the same debugging capabilities found in high-end emulation systems, but at a higher speed and at a fraction of their cost.

Via a newly developed and flexible networking technology, up to eight ZeBu boards can be connected together to accommodate designs that range from one to 12 million ASIC-equivalent gates.

The ZeBu boards can be used collectively on one large design or individually and concurrently on smaller designs.

"We are quite pleased by CISRA's decision", says Lauro Rizzatti, EVE's Vice President of Marketing.

"It confirms our belief that ZeBu's fast execution speed, interactive debugging, and affordable price, makes it an ideal verification tool for each and every designer".

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