Design rule checking runs 100 times faster

HiPer Verify is a foundry-compatible, hierarchical design rule checking tool that is tightly integrated with the Tanner EDA L-Edit layout editor.

HiPer Verify is a foundry-compatible, hierarchical design rule checking (DRC) tool that is tightly integrated with the Tanner EDA L-Edit layout editor.

The tool also offers background DRC.

This is the first product in Tanner EDA's new HiPer line of layout and verification software and it delivers 100 times faster DRC in a typical analogue or mixed signal design.

HiPer Verify allows users to run both Calibre and Dracula textual command files unmodified, directly from the foundry.

This eliminates manual DRC setup and removes a potential source of errors.

When foundries release revised rule sets, command files are automatically updated, minimising design flow disruption.

For companies that use multiple foundries, HiPer Verify enables easy switching between foundries without the need to update DRC rules manually each time.

Background DRC enables designers to continue editing any file, including the one being checked, while DRC is running.

Results are returned as they are found, permitting designers to inspect and correct errors while the DRC is running.

For accuracy, cells being checked can be locked to prevent edits while DRC is in progress.

Other features include a command file editor and enhanced DRC error navigator.

The command file editor enables syntax checking of DRC commands, shows derivations of intermediate layers of a design and provides coloured keyword highlighting.

Building on the hierarchical error browser in the L-Edit Pro layout tool, HiPer Verify's DRC error navigator takes users directly to the area of the design where an error occurs, facilitating fast correction.

Multiple command files can be set up to run sequentially on a cell in a single DRC run and rules can be conveniently grouped into separate files such as pad rules and core rules, then selected files can be run as needed.

HiPer Verify also supports the ability to reprocess results from a DRC check in subsequent DRC operations, known as conjunctive rules, allowing very powerful rules to be written.

Orthogonal, 45-degree and all-angle layout are supported, allowing verification of even the most complex analogue, MEMS and integrated optical device designs.

HiPer Verify is a Windows-based tool that requires Tanner's L-Edit Pro tool but it does not require that L-Edit be used to lay out a chip.

It is available now for new users or as an upgrade option for L-Edit Pro users.

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