Product category:
Design and Development Software
News Release from: EDA Solutions | Subject: T-Spice v11
Edited by the Electronicstalk Editorial
Team on 21 April 2005
Uprated simulator leads DAC launches
At DAC 2005 Tanner EDA will demonstrate a host of new ways for designers of analog and mixed-signal ICs and MEMs devices to improve design quality, productivity and yield.
At DAC 2005 Tanner EDA will demonstrate a host of new ways for designers of analogue and mixed-signal ICs and MEMs devices to improve design quality, productivity and yield Six tool enhancements spanning the company's complete Windows-based design flow are to be introduced at the show
This article was originally published on Electronicstalk on 28 Jul 2005 at 8.00am (UK)
Related stories
Simulator covers sub-100nm process MOSFETs
T-Spice v11 is the latest version of the analogue circuit simulation platform from Tanner EDA.
Budget entry to IC layout and verification
L-Edit Pro V11 is the latest version of the analogue and mixed-signal design software for IC, MEMS and optical design from Tanner EDA.
Global foundry support for IC design tools
Users of Tanner EDA mixed-signal design tools now have easy access to X-Fab IC fabrication facilities following the introduction of support for the tools in free development kits from the foundry.
T-Spice v11 will add full support for Berkeley BSIM3 and BSIM4 device models to improve simulation accuracy by addressing MOSFET physical effects into the sub-100nm regime.
The company's flagship L-Edit layout tool gets new a new RDL package that analyses the IC layout and automatically positions power (Vdd) rails such that voltage variations created by varying power consumption across each chip are equalised.
This allows designers to layout chips in the most efficient way and helps to eliminate manufacturing defects.
In addition, L-Edit TFT is a new package with which Tanner EDA will demonstrate automation of the process of lead routing for thin-film transistors used in flat-panel display technology.
Using another new product, L-Edit MEMS Design, Tanner EDA will show how all-angle design rule checking (DRC) assists engineers in improving design quality and reducing time-to-market in the design of MEMS devices.
To increase silicon yields, wafer tools for use with both in-house and third-party foundries are being demonstrated for the first time.
Finally, new digital and analogue place-and-route functions added to L-Edit will debut at DAC.
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