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Multithreading accelerates analogue simulations
Tanner EDA has added multithreading analogue simulation to its T-Spice simulator for analogue and mixed-signal chip designs, available in the UK from EDA Solutions.
At DATE 2007 Tanner EDA gave its first demonstrations of multithreading analogue simulation capability of its T-Spice simulator for analogue and mixed-signal chip designs.
This capability has been developed for use on computers with multiple processor cores.
On average, the enhanced tool delivers 40% faster simulations on single-processor, dual-core computers and 80% faster run times on two-processor, dual-core machines.
The simulator is tightly integrated with schematic capture and waveform viewing, boosting design productivity and shortening the design cycle.
The maximum benefit is realised in simulation-intensive projects involving high performance or large device count designs.
T-Spice automatically breaks down the workload into small tasks and dynamically distributes these tasks to multiple threads for processing.
It parallelises the model evaluations during the Newton-Raphson iterations using Intel's Thread Building Blocks (TBB) technology.
T-Spice also uses a direct Level-3 BLAS sparse linear solver from Intel to solve the linear system solution.
T-Spice generates fast and accurate simulations of analogue and mixed-signal IC designs.
It can read HSpice and P-Spice netlist formats directly and includes a Simulation Manager and device modelling features.
T-Spice offers support for the latest industry models, including Penn State Philips Model (PSP), BSIM3.3, BSIM4.5, BSIM SOI, EKV, MOS11, MOS20, VBIC and Mextram.
Proprietary numerical techniques achieve convergence for circuits that are often impossible to simulate with other Spice programmes and device modelling algorithms allow designers to switch from the fastest table-based model evaluation to the most accurate direct model evaluation.
Custom models can be created within T-Spice using algebraic expressions for voltage and current controlled sources, data from external tables, or the C programming language.
Multithreading will become a standard feature in the T-Spice simulator beginning June 2007.
T-Spice starts at US $6495 per seat.
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