Product category:
Design and Development Software
News Release from: Faraday Technology | Subject: PowerSmart
Edited by the Electronicstalk Editorial
Team on 23 July 2007
ASIC designs are traded optimised in RTL
Front-end tool allows designers to perform power tradeoff and optimisation at the RTL level.
Faraday Technology has further enhanced its PowerSmart ultra-low-power ASIC design flow to include a front-end tool that allows designers to perform power tradeoff and optimisation at the RTL level Sequence Design, a leader in providing advanced power-aware design tools, will be the supply partner of this tool
This article was originally published on Electronicstalk on 2 Feb 2007 at 8.00am (UK)
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Through a collaborative licensing arrangement with Sequence, Faraday USA will bundle the Powertheatre tool suite together with its Faraday Design Kit and make the total package available to its customers.
Leveraging Sequence's Powertheatre unique RTL power analysis capability, Faraday's customers will have the ability to evaluate multiple power management architectural options at the RTL stage where the impact of power savings is highest.
Once the designers are satisfied with the tradeoff of performance, area, and power, they can seamlessly migrate those power techniques into the subsequent synthesis and place and route stage with Faraday's fully integrated PowerSmart design flow methodology.
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"Our partnership with Sequence allows Faraday to help our customers optimise for power at the architectural level, which is a fundamental enhancement".
"Faraday aims to provide the most efficient silicon-in area, power, and performance-to enable our customers to have the most competitive products in the market", says Dr George Hwang, Vice President of International Business at Faraday.
"The combination of Faraday's advanced ASIC design platform and Sequence's Powertheatre will enable our customers to address the most demanding low-power SoC applications", he continues.
"Sequence and Faraday both believe that power is strategic to the competitiveness of our customers; hence we form a strategic partnership with Faraday to deliver technology for the PowerSmart ultra-low-power ASIC design flow", says Vic Kulkarni, Sequence President and CEO.
"Faraday is a leader in SoC development from inception to silicon, so our collaboration is natural to deliver a world-class solution".
Faraday's PowerSmart design flow currently comprises of the PowerSlash IP portfolio, Fusion multiple-threshold-voltage process, PowerSwitch and PowerCut, which together implement an extensive set of power management utilities such as multiple supply domains, power and clock gating and voltage islands.
"By adding Sequence Powertheatre suite to this design flow, Faraday now offers a comprehensive and fully integrated design flow that can optimise power management techniques from RTL to GDS", says Chung Ho, Vice President of ASIC Marketing and Engineering at Faraday USA.
"Customers will be able to explore all the power saving techniques available in the Faraday library to the fullest extent, and see the results upfront".
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