Product category:
Design and Development Software
News Release from: Flomerics
Edited by the Electronicstalk Editorial
Team on 07 December 2006
System-in-package design infrastructure
The new System-in-Package (SiP) paradigm in electronics product implementation allows the mixing of optimum active and passive device technologies in bare die format within a single package outline
Building the system-in-package design infrastructure The new System-in-Package (SiP) paradigm in electronics product implementation allows the mixing of optimum active and passive device technologies in bare die format within a single package outline for cost effective, high performance, short time-to-market functionality well matched to a wide range of low, medium and high volume electronics product applications The novel addition of embedded passive component technology within such SiP modules also promises further performance, size, weight and cost benefits
This article was originally published on Electronicstalk on 13 Aug 2001 at 8.00am (UK)
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The SiP approach allows board level functionality to be realised at the package level for smaller, lighter and higher functionality products.
However a major obstacle to the successful introduction of this new technology is the lack of a robust design methodology supported by rigorous simulation tools, accurate component and technology models.
The Adept-SiP project, that is funded through the DTI Technology Programme under the Design, Simulation and Modelling Technology priority area, is directed at eliminating this obstacle.
The 30-month Adept-SiP project started in May 2006 and will develop and demonstrate a rigorous, right-first-time design and supply chain management methodology for novel System-in-Package Electronics Product Functions.
It will address schematic capture, partitioning and active device, substrate and package design to meet specific performance, cost, size and weight targets.
Other key design stages will include thermal and EMC design, and design-for-manufacture, for test, reliability and for environmental impact.
Novel, high density embedded passive substrate technologies will be designed and simulated, process characterisation undertaken and component models developed for the full range of passive components and interconnection and assembly structures.
The core design, simulation and modelling activities will then be proven in SiP technology demonstrators.
The Adept-SiP project partners include Filtronic Broadband and Zarlink Semiconductors' Advanced Packaging Division based in Caldicot as SiP product end-users, Leeds University as modelling provider, Zuken, QuantumCAD and Flomerics as design providers, and Wurth Elektronik and TWI as technology providers. Request free introductory details about products from Flomerics ...
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